H04N19/53

Hardware and software friendly system and method for decoder-side motion vector refinement with decoder-side bi-predictive optical flow based per-pixel correction to bi-predictive motion compensation

Methods and system, including decoders and encoders, for interprediction. In one aspect, a method includes selecting reference samples based on motion information of a current picture block of a current picture, deriving first interpolated samples by performing a first interpolation on the selected reference samples, deriving an integer distance delta motion vector for a target sub-prediction unit (PU) by performing integer-distance MVR, deriving M×M pixel matrix flow vectors by performing BPOF, for each M×M pixel matrix in the target sub-PU, based on the first interpolated samples and the integer distance delta motion vector, deriving second interpolated samples by performing a second interpolation on the reference samples, computing at least one correction parameter for the target sub-PU based on the M×M pixel matrix flow vectors, the first interpolated samples and the second interpolated samples, and performing bi-prediction based on the second interpolated samples and the at least one correction parameter.

SYSTEMS AND METHODS FOR GAME-GENERATED MOTION VECTORS
20230089232 · 2023-03-23 · ·

Systems and methods for integrated graphics rendering are disclosed. In certain embodiments, the systems and methods utilize a graphics engine, a video encoding engine, and remote client coding engine to render graphics over a network. The systems and methods involve the generation of per-pixel motion vectors, which are converted to per-block motion vectors at the graphics engine. The graphics engine injects these per-block motion vectors into a video encoding engine, such that the video encoding engine may convert those vectors into encoded video data for transmission to the remote client coding engine.

Shared motion estimation cost metrics for overlapping units

An apparatus having a processor and a circuit is disclosed. The processor may be configured to (i) compare, at a first level of a motion estimation hierarchy, first units of a current picture with a reference picture to generate first metrics, (ii) combine, at the first level, the first metrics to generate second metrics and (iii) refine, at a second level of the hierarchy, the first metrics and the second metrics to generate motion vectors. Multiple metrics may be refined in parallel. The first metrics generally correspond to the first units in an overlapping unit of the current picture. The second metrics generally correspond to a plurality of second units in the overlapping unit. Each second unit may overlap one or more first units. The circuit may be configured to process the overlapping unit based on the motion vectors to generate an output signal.

Shared motion estimation cost metrics for overlapping units

An apparatus having a processor and a circuit is disclosed. The processor may be configured to (i) compare, at a first level of a motion estimation hierarchy, first units of a current picture with a reference picture to generate first metrics, (ii) combine, at the first level, the first metrics to generate second metrics and (iii) refine, at a second level of the hierarchy, the first metrics and the second metrics to generate motion vectors. Multiple metrics may be refined in parallel. The first metrics generally correspond to the first units in an overlapping unit of the current picture. The second metrics generally correspond to a plurality of second units in the overlapping unit. Each second unit may overlap one or more first units. The circuit may be configured to process the overlapping unit based on the motion vectors to generate an output signal.

Adaptive Affine Motion Compensation Unit Determining in Video Picture Coding Method, Video Picture Decoding Method, Coding Device, and Decoding Device
20230077431 · 2023-03-16 ·

The present disclosure provides a video picture coding method, a video picture decoding method, a coding device, and a decoding device. The method includes: determining a distance between control points for an affine picture block; determining a motion vector difference for the affine picture block, motion vectors of the control points being used to determine the motion vector difference; and performing coding processing on the affine picture block over a size that includes a horizontal length and a vertical length, wherein the horizontal length and the vertical length vary based on the distance between the control points, the motion vector difference, and a motion vector precision.

Adaptive Affine Motion Compensation Unit Determining in Video Picture Coding Method, Video Picture Decoding Method, Coding Device, and Decoding Device
20230077431 · 2023-03-16 ·

The present disclosure provides a video picture coding method, a video picture decoding method, a coding device, and a decoding device. The method includes: determining a distance between control points for an affine picture block; determining a motion vector difference for the affine picture block, motion vectors of the control points being used to determine the motion vector difference; and performing coding processing on the affine picture block over a size that includes a horizontal length and a vertical length, wherein the horizontal length and the vertical length vary based on the distance between the control points, the motion vector difference, and a motion vector precision.

Hierarchical packing of syntax elements

A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.

Hierarchical packing of syntax elements

A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.

TEMPLATE MATCHING REFINEMENT IN INTER-PREDICTION MODES

A device for decoding video data includes memory configured to store the video data and processing circuitry. The processing circuitry is configured to determine that a current block of the video data is inter-predicted in a combined inter-intra prediction (CIIP) mode or a geometric partitioning mode (GPM), determine that template matching is enabled for the current block, generate a motion vector for the current block based on template matching; determine a prediction block for the current block based on the motion vector in accordance with the CIIP mode or the GPM, and reconstruct the current block based on the prediction block.

TEMPLATE MATCHING BASED AFFINE PREDICTION FOR VIDEO CODING

A video decoder can be configured to determine that a current block in a current picture of the video data is coded in an affine prediction mode; determine one or more control-point motion vectors (CPMVs) for the current block; identify an initial prediction block for the current block in a reference picture using the one or more CPMVs; determine a current template for the current block in the current picture; and determine an initial reference template for the initial prediction block in the reference picture; and perform a motion vector refinement process to determine a modified prediction block based on a comparison of the current template to the initial reference template.