Methods and apparatuses of determining an alignment level between motion compensated reference patches for reducing motion vector refinement steps are provided. According to one method, obtaining, by a decoder, motion compensated interpolated samples based on sub-pixel accurate merge motion vectors from a bilinear motion compensated interpolation; computing, by the decoder, a sum of absolute differences (SAD) between two motion compensated reference patches using a subset of the motion compensated interpolated samples; determining, by the decoder, whether the SAD is less than a coding unit (CU) size-dependent threshold value; when the SAD is less than the CU size-dependent threshold value: skipping remaining decoder-side motion vector refinement (DMVR) process steps; and performing final motion compensation; and when the SAD is not less than the CU size-dependent threshold value: performing the remaining DMVR process steps; and performing the final motion compensation.

An index, indicating a vector representing a spatial relationship between a block to be encoded and at least one block spatially at the periphery of the block to be encoded, is encoded in a case where an coding mode to encode the block to be encoded is a first coding mode, and an index, indicating a vector representing a spatial relationship between the block to be encoded and at least one block spatially at the periphery of the block to be encoded, and a vector correlated with a block within an image that is different from the image to be encoded, is encoded in a case where the coding mode to encode the block to be encoded is a second coding mode.

An index, indicating a vector representing a spatial relationship between a block to be encoded and at least one block spatially at the periphery of the block to be encoded, is encoded in a case where an coding mode to encode the block to be encoded is a first coding mode, and an index, indicating a vector representing a spatial relationship between the block to be encoded and at least one block spatially at the periphery of the block to be encoded, and a vector correlated with a block within an image that is different from the image to be encoded, is encoded in a case where the coding mode to encode the block to be encoded is a second coding mode.

Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.

Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.

A load in processing of searching for a motion vector is reduced. In order to solve the problem described above, a motion vector derivation apparatus according to one aspect of the present invention that derives a motion vector to be referred to for generating a prediction image to be used for coding or decoding of a video includes a motion vector search unit configured to search for a motion vector on a prediction unit basis through matching processing. The motion vector search unit is configured to stop search of the motion vector, depending on whether or not a conditional expression according to a pixel bit-depth is satisfied.

Aspects of the disclosure provide a method and an apparatus for video coding. A processing circuitry determines a process unit size for a decoder-side motion vector refinement (DMVR). Then, the processing circuitry enables an application of the DMVR on a current block when a size of the current block is smaller than or equal to the process unit size; and disables the application of the DMVR on the current block when the size of the current block is larger than the process unit size. In an example, the application of the DMVR refines the motion vectors with or without a template block.

Aspects of the disclosure provide a method and an apparatus for video coding. A processing circuitry determines a process unit size for a decoder-side motion vector refinement (DMVR). Then, the processing circuitry enables an application of the DMVR on a current block when a size of the current block is smaller than or equal to the process unit size; and disables the application of the DMVR on the current block when the size of the current block is larger than the process unit size. In an example, the application of the DMVR refines the motion vectors with or without a template block.

A data processing system for performing motion estimation in a sequence of frames having first and second frames each divided into respective sets of blocks of pixels, includes a vector generator configured to form motion vector candidates representing mappings of pixels between the first and second frames; and a vector processor configured to, for a search block of the first frame, identify a first motion vector candidate ending in a block of the second frame collocated with the search block and form an output vector for the search block which is substantially parallel to the first motion vector candidate and represents a mapping of pixels from the search block to the second frame.

A data processing system for performing motion estimation in a sequence of frames having first and second frames each divided into respective sets of blocks of pixels, includes a vector generator configured to form motion vector candidates representing mappings of pixels between the first and second frames; and a vector processor configured to, for a search block of the first frame, identify a first motion vector candidate ending in a block of the second frame collocated with the search block and form an output vector for the search block which is substantially parallel to the first motion vector candidate and represents a mapping of pixels from the search block to the second frame.