A high dynamic range imaging pixel may include a photodiode that generates charge in response to incident light. When the generated charge exceeds a first charge level, the charge may overflow through a first transistor to a first storage capacitor. When the generated charge exceeds a second charge level that is higher than the first charge level, the charge may overflow through a second transistor. The charge that overflows through the second transistor may alternately be coupled to a voltage supply and drained or transferred to a second storage capacitor for subsequent readout. Diverting more overflow charge to the voltage supply may increase the dynamic range of the pixel. The amount of charge diverted to the voltage supply may therefore be updated to control the dynamic range of the imaging pixel.

Provided is an a imaging device that acquires a distance image excluding influence of background light in one frame scanning period and acquires a visible image in a separate frame from a single imaging sensor, and includes an infrared light source that emits infrared light, and a solid state imaging device including a plurality of first pixels and a plurality of second pixels, which respectively include vertical overflow drains, and are arranged in a matrix on a semiconductor substrate, the plurality of first pixels converting the infrared light into signal charges, and the plurality of second pixels converting visible light into signal charges. The solid state imaging device outputs a first signal obtained from the plurality of first pixels in an irradiation period of infrared light, and a second signal obtained from the plurality of first pixels in a non-irradiation period of infrared light, in a first frame scanning period, and outputs a third signal obtained from the plurality of first pixels and a fourth signal obtained from the plurality of second pixels, in a second frame scanning period.

A method, apparatus and system are described providing a high dynamic range pixel. An integration period has multiple sub-integration periods during which charges are accumulated in a photosensor and repeatedly transferred to a storage node, where the charges are accumulated for later transfer to another storage node for output.

An image sensor may include an array of image sensor pixels. Each image sensor pixel may have signal storage capabilities implemented through a write-back supply line and a control transistor for the supply line. Each image sensor pixel may output pixel values over column lines to switching circuitry. The switching circuitry may route the pixel values to signal processing circuitry. The signal processing circuitry may perform analog and/or digital processing operations utilizing analog circuits or pinned diode devices for image signal processing on the pixel values to output processed pixel values. The processing circuitry may send the processed pixel values back to the array. This allows the array to act as memory circuitry to support processing operations on processing circuitry in close proximity to the array. Configured this way, signal processing can be performed in close proximity to the array without having to move pixel signals to peripheral processing circuitry.

The present invention provides a pixel circuit comprising a pinned photodiode, at least one first transfer gate for electrically connecting the pinned photodiode to at least one storage node and at least one further transfer gate. The at least one further gate can connect the at least one storage node with at least one floating diffusion node. At least one merging switch is included for allowing connection between the at least one floating diffusion node with one or more capacitor nodes, which can accept charge that exceeds the maximum storage capacity of the storage node.

An image sensor may have an array of pixels that include nested sub-pixels that each have at least one respective photodiode. An inner sub-pixel of a pixel with nested sub-pixels may have a relatively lower effective light collecting area compared to an outer sub-pixel of the pixel within which the inner sub-pixel is nested. A pixel circuit for the nested sub-pixels may include an overflow capacitor and/or a coupled gate circuit used to route charges from the photodiode in the inner sub-pixel. The lower light collecting area of the photodiode in the inner sub-pixel, with optional flicker mitigation charge routing from the coupled gates structure, may reduce the size of the capacitors required to capture photodiode and photodiode overflow charge responses. Flicker mitigation charge routing using a coupled gates structure may allow an adjustable proportion of the overflow charge to be stored in one or more storage capacitors.

A solid-state imaging device includes: a plurality of pixels arranged in a matrix on a semiconductor substrate, wherein each of the plurality of pixels includes: a photoelectric converter that converts received light into a signal charge; a plurality of read gates that each read the signal charge from the photoelectric converter; a plurality of charge accumulators that each accumulate the signal charge read by any one of the plurality of read gates; and a charge holder that receives, from one of the plurality of charge accumulators, transfer of the signal charge accumulated in the charge accumulator, holds the signal charge, and transfers, to one of the plurality of charge accumulators, the signal charge held.

An imaging device may have an array of image sensor pixels. Each image sensor pixel of the array of image sensor pixels may have first and second photodiodes with different sensitivities. The photodiode having the lower sensitivity may be coupled to a storage diode and may alternately discard charge and transfer charge to the storage diode during an integration time for flicker mitigation. The length of time for which charge is discarded in each shutter cycle for flicker mitigation may be selected to adjust dynamic range of the imaging pixel. Upon conclusion of the integration time, charge from the storage diode may be sampled in a high conversion gain readout. Overflow charge from a dual conversion gain capacitor may then be sampled in a low conversion gain readout. Charge from the photodiode having higher sensitivity may finally be sampled in a high conversion gain readout.

The present technology relates to a solid-state imaging device and an electronic device capable of improving a saturation characteristic. A photo diode is formed on a substrate, and a floating diffusion accumulates a signal charge read from the photo diode. A plurality of vertical gate electrodes is formed from a surface of the substrate in a depth direction in a region between the photo diode and the floating diffusion, and an overflow path is formed in a region interposed between a plurality of vertical gate electrodes. The present technology may be applied to a CMOS image sensor.

A solid-state imaging device includes: pixels arranged in a matrix on a semiconductor substrate. Each of the pixels includes: a photoelectric converter that converts received light into a signal charge; at least one read gate that reads the signal charge from the photoelectric converter; charge accumulators that each accumulate the signal charge read by the at least one read gate; and a charge holder that receives, from one of the charge accumulators, transfer of the signal charge accumulated in the charge accumulator, holds the signal charge, and transfers, to one of the charge accumulators, the signal charge held, each of the charge accumulators includes a part of a transfer channel and a part of a transfer electrode overlapping with the part of the transfer channel in a planar view of the semiconductor substrate, and the transfer channel per one pixel comprises transfer channels.