A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of unit power supply circuits that generate a second power supply voltage from a first power supply voltage based on a reference voltage and supply the second power supply voltage to amplifier transistors provided in the plurality of pixel circuits; and a regulator circuit that generates the reference voltage that is constant. Each of the unit power supply circuits is provided for a corresponding one of the columns of the plurality of pixel circuits or for a corresponding one of the pixel circuits, and supplies the second power supply voltage to the amplifier transistors in the pixel circuits that belong to the corresponding one of the columns or to the amplifier transistor in the corresponding one of the pixel circuits.

A solid-state imaging device includes: a pixel array including a plurality of pixel circuits arranged in rows and columns; a vertical signal line that is provided for each of the columns and transmits pixel signals; a column AD circuit that is provided for each of the columns and AD converts the pixel signals from the vertical signal line; a column-switching circuit that is interposed in the vertical signal line between the pixel array and the column AD circuit and switches connection between the vertical signal line and the column AD circuit; a controller that causes the column-switching circuit to switch the connection for every horizontal scan period; and a restoration circuit that restores ordering of the AD converted signals so as to correspond to ordering in which the vertical signal lines are arranged in the pixel array.

An image sensor includes a pixel array unit including an active pixel area including active pixels, a first dark area including first dark pixels, and a second dark area including second dark pixels, an offset extractor configured to extract a final dark offset value, and a corrector configured to correct pixel data values of the active pixels based on the final dark offset value. The offset extractor extracts a per-column dark offset value, a global dark offset value, a per-row average, and a per-row noise value, selects one of the extracted per-column dark offset value and global dark offset value, and extracts the final dark offset value from the per-row noise value and either the per-column dark offset value or the global dark offset value.

A correlated double sampling (CDS) circuit includes a comparator and a first circuit. The comparator including, a first input terminal, a second input terminal, at least one output terminal, and a plurality of first transistors operably coupled between the at least one output terminal and the first and second input terminals. The first circuit includes at least one second transistor, the at least one second transistor operably coupled to the at least one output terminal and one of the first input terminal and the second input terminal, the at least one second transistor having at least one of (i) a different number of layers than the first transistors, and (ii) a different dimension than the first transistors.

A driver includes a first level shifting unit generating a second signal swinging in a second threshold range in response to a first signal swinging in a first threshold range, a second level shifting unit generating a third signal swinging in a third threshold range in response to the second signal, a first pull-up driving unit driving an output terminal with a first high-voltage in response to the second signal, a first pull-down driving unit driving the output terminal with a first low voltage in response to the third signal, a second pull-down driving unit driving the output terminal with a second low voltage higher than the first low voltage in response to the fourth signal, and a first path coupling unit coupling the second pull-down driving unit with the output terminal in response to the second signal.

Provided is an imaging apparatus, including: a first and a second A/D conversion units converting signals output from a first and a second groups of columns of pixels, respectively; a first reference signal supply unit supplying, to the first A/D conversion unit, at least one of reference signals having a first and a second change rates per time; a second reference signal supply unit supplying, to the first A/D conversion unit, at least one of reference signals having a third and a fourth change rate per time; and an adjusting unit adjusting at least one of the first to fourth change rates so that at least one of a difference in change rate per time between the first and the third change rate, and a difference in change rate per time between the second and the fourth change rate is reduced.

A solid-state imaging device includes a pixel array unit and a current source array unit. The pixel array unit includes N pixel units arrayed in a first direction. Each pixel unit includes a photodiode and an amplification MOS transistor. The current source array unit includes N current sources. Each current source includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a setting circuit. The setting circuit sets ON/OFF of the third MOS transistor on the basis of a voltage of the signal line, thereby suppressing fluctuations in an amount of current flowing from a Vr supply line to a ground potential supply terminal via a common node and the first MOS transistor.

Photoelectric conversion device includes stacked first and second substrates. The first substrate includes pixel array, first joint portion arranged in the pixel array and connected to pixels in the pixel array, and power supply pad connected to the first joint portion. The second substrate includes readout circuit to read signal from the pixel array via signal line, and second joint portion jointed to the first joint portion. The readout circuit includes limiter circuit to limit amplitude of potential of the signal line. Power supply terminal of the limiter circuit is connected to the second joint portion, and power supply potential applied to the power supply pad is supplied to the pixels and supplied to the power supply terminal of the limiter circuit via the first and second joint portions.

An endoscope includes: an image sensor including: pixels for receiving light to generate image signals, and reading circuits sharing predetermined number of pixels with one another; a format converter configured to convert the image signals output from the image sensor into a predetermined format corresponding to a processing device for performing image processing on the image signals; and a connector including the format converter and configured to be connected to the processing device. The image sensor includes a color filter of a Bayer array in which a red filter for passing a red component and a first green filter for passing a green component are alternately arranged in even lines of horizontal lines of the pixels, and a second green filter for passing a green component and a blue filter for passing a blue component are alternately arranged in odd lines of the horizontal lines.

An image sensor may include an array of image pixels arranged in rows and columns. Each column of pixels may be coupled to current source transistors and active clamping circuitry. The active clamping circuitry may be configured to sample a reset voltage and to selectively pull down the column line after a charge transfer operation if the column line exceeds the previously sampled reset voltage. The active clamping circuitry can reduce settling time during low light conditions while eliminate column fixed pattern noise.