A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.

An electronic device and methods for fabricating the same are disclosed herein that utilize a dam formed on a printed circuit board (PCB) that is positioned to substantially prevent edge bond material, utilized to secure a chip package to the PCB, from interfacing with the solder balls transmitting signals between the PCB and chip package.

The present disclosure provides a manufacturing method of a flat panel liquid crystal antenna, including the following steps: providing a first substrate, wherein the two sides of the first substrate are provided with a first metal film layer and a third metal film layer respectively; simultaneously patterning the metal film layer on the two sides to obtain a patterned first metal film layer and a patterned third metal film layer; providing a second substrate, wherein one side of the second substrate is provided with a second metal film layer; patterning the second metal film layer to obtain a patterned second metal film layer; and oppositely bonding the first substrate and the second substrate to form a liquid crystal cell, and preparing a liquid crystal layer. The present disclosure also provides a flat panel liquid crystal antenna by using the above method.

A high-frequency electronic component includes a ceramic multilayer substrate, ground electrodes provided at different layers of the ceramic multilayer substrate, and a shielding film covering at least a side surface among surfaces of the ceramic multilayer substrate. Two or more of the ground electrodes are exposed to the side surface of the ceramic multilayer substrate and are electrically connected to the shielding film. On the side surface of the ceramic multilayer substrate, the two or more of the ground electrodes do not overlap each other in a thickness direction of the ceramic multilayer substrate.

An integrated circuit chip carrier includes a wall surrounding a cavity. The wall includes one or more levels where each level is formed from a layer of a resin around a block. The block is made of a material different from the resin. The block is removed to open the cavity.

A method of manufacturing a circuit board having waveguides including forming a waveguiding structure by injection molding. The waveguiding structure includes a plurality of waveguides arranged at intervals and at least one connecting portion connecting two adjacent waveguides. Each waveguide includes a waveguiding substrate and at least one protrusion on the waveguiding substrate. The connecting portion is removed to obtain at least two waveguides. A metal layer is formed to wrap the whole outer surface of each waveguide. A plurality of receiving grooves is formed to penetrate a wiring board. Each waveguide wrapped by the metal layer is embedded in one of the receiving grooves. The waveguides and the wiring board are fixed. A portion of the metal layer on a surface of each protrusion facing away from the waveguiding substrate is removed. A circuit board is also provided.

A circuit board with reduced dielectric losses enabling the movement of high frequency signals includes an inner circuit board and two outer circuit boards. The inner circuit board includes a first conductor layer and a first substrate layer. The first conductor layer includes a signal line and two ground lines on both sides of the signal line. The first substrate layer covers a side of the first conductor layer and defines first through holes which expose the signal line. Each outer circuit board includes a second substrate layer and a second conductor layer. The second substrate layer abuts the inner circuit board and defines second through holes which are not aligned with the first through holes, partially surrounding the signal line with air which has a very low dielectric constant. A method for manufacturing the high-frequency circuit board is also disclosed.

A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 μm. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.

The present disclosure provides circuit structure configured to decrease a phase difference between a first signal and a second signal. The circuit structure includes substrate. The substrate includes a first conductive layer, a first woven dielectric layer, and a second woven dielectric layer. The first conductive layer is disposed over the substrate. The first conductive layer includes a circuit pattern configured to transmit the first signal and the second signal. The first woven dielectric layer is stacked below the first conductive layer. The first woven dielectric layer has a plurality of first opens. The second woven dielectric layer is stacked below the first woven dielectric layer. The second woven dielectric layer has a plurality of second opens. The plurality of first opens and the plurality of second opens are misaligned from a top view.

A PCB bridge for interconnection of two or more semiconductor chips for data communication between the semiconductor chips includes a plurality of metal strips; and a dielectric material disposed in between the plurality of metal strips. The PCB bridge is employed in a vertical direction in a semiconductor module for interconnection of two or more semiconductor chips, the vertical direction of the PCB bridge provides a flexible impedance matching by adjusting the dielectric material and a trace width of the PCB bridge, and the vertical direction of the PCB bridge avoids signal reflections by matching the impedance to a source, and a trace length of the PCB bridge is limited by spacing in between two semiconductor chips which further limited inductance of the trace of the PCB bridge.