Apparatuses and methods for routing and transmitting signals in an electronic device are described. Various signal paths may be routed to avoid or limit reference transitions or transitions between layers of a structure of a device (e.g., printed circuit board (PCB)). In a memory module, for example, different data inputs/outputs (e.g., DQs) may be routed through different layers of a PCB according to their relative location to one another. For instance, DQs associated with even bits of a byte may be routed on one layer of a PCB near one ground plane, and DQs associated with odd bits of the byte may be routed on a different layer of the PCB near another ground plane.

A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.

A transmission line substrate includes a line portion and a connecting portion. The transmission line substrate includes a base material, a first ground conductor, a second ground conductor, a signal line, an external electrode, a second interlayer connection conductor. In the line portion, a transmission line having a strip line structure including the signal line, the first ground conductor, and the second ground conductor is provided. In the connecting portion, the signal line and the external electrode face each other in a stacking direction, without including therebetween an interlayer connection conductor. The second interlayer connection conductor surrounds a facing portion in which the signal line and the external electrode face each other in the Z-axis direction.

A multiple layer printed circuit board (PCB) in which the cores (or core layers) are removed and replaced with prepreg layers, which provide structure integrity for the PCB. Such a multi-layer PCB may include a plurality of layers that include a plurality of signal layers, a plurality of ground plane layers, a plurality of inner signal layers, and a single core substrate layer. Each layer in the plurality of layers may be separated from every other layer in the plurality of layers by at least one prepreg substrate layer.

A wireline communications system is described. The wireline communications system includes a printed circuit board (PCB). The wireline communications system also includes a system on chip (SoC) die on the PCB. The wireline communications system further includes an external memory device coupled to a memory interface of the SoC die. The external memory device is coupled to the memory interface of the SoC die through a PCB trace. A length of the PCB trace is configured according to an operating speed of the memory interface.

A radio frequency (RF) system including first and second planar RF devices coupled by non-galvanic interconnect. According to various embodiments, a first RF device and a second RF device are separated by a dielectric layer, each of the first and second RF devices including a plurality of pads disposed on surface and surrounded by a common electrode, the common electrode configured as a grounded metal shield, wherein pads of the first RF device and pads of the second RF device face each other to provide capacitive coupling between the pads. The disclosure may reduce complexity and size of the system, and offer more reliable and easily producible interconnection between elements of the RF system.

A printed wiring board includes a first resin insulating layer, a second resin insulating layer formed on a surface of the first layer, and a conductor layer formed on the surface of the first layer such that the second layer is covering the conductor layer and that the conductor layer includes first, second, third, fourth, fifth, and sixth circuits such that the third and fourth circuits are sandwiching the first circuit and that the fifth and sixth circuits are sandwiching the second circuit. Widths between the first and third circuits and between the first and fourth circuits are 5 μm to 14 μm, and when a width between the second and fifth circuits and a width between the second and sixth circuits is 20 μm or more, the upper surface of the first circuit, and the upper surface and side walls of the second circuit are formed to have unevenness.

System, apparatuses and methods are disclosed which relate to the use of substrate integrated waveguide technology in front-end modules. An example circuit card assembly for use as a cellular base station front-end is disclosed which includes at least one component printed circuit board (PCB) layer having front-end module hardware components and at least one filter PCB layer including at least one substrate integrated waveguide (SIW) filter.

A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal applied to the conductive signal transmission structure has a signal speed of at least 112 Gbps.

Provided are: a surface-treated copper foil including a surface-treated layer formed on at least one side of an untreated copper foil and an oxidation preventing layer formed on the surface-treated layer, wherein the surface-treated layer contains copper particles having an average particle diameter of about 10 nm to about 100 nm and has a 10-point average roughness, Rz, of about 0.2 μm to about 0.5 μm and a gloss (Gs 60°) of about 200 or more, and the oxidation preventing layer contains nickel (Ni) and phosphorus (P); a manufacturing method thereof; a copper foil laminate including the same; and a printed wiring board including the same.