Disclosed is an optical receiver. The optical receiver includes a circuit board, a base member, a photodetector mounted on the base member, a transimpedance amplifier, and a capacitor. The base member is disposed between a first grounding pattern and a second grounding pattern on a first side of the circuit board. The transimpedance amplifier is mounted on the first grounding pattern. The capacitor is mounted on the second grounding pattern. The first wiring pattern and the second wiring pattern are apart from both the first grounding pattern and the second grounding pattern in a plan view of the first side. The first grounding pattern is electrically connected to the second grounding pattern through a grounding pattern formed on the first side.

An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.

A printed board includes a first and second insulator extending in a first direction; a third insulator extending in a second direction and including a first and second portion located above and below the first insulator respectively in a third direction; a fourth insulator extending in the second direction, and including a third and fourth portion located below and above the first insulator respectively in the third direction; and a first and second conductor extending in the first direction, and arranged along the second direction with a first pitch therebetween. The first pitch is an n multiple of a first distance that is based on an interval between the first and second portion or the third and fourth portion. The n is an integer equal to or greater than 1.

Embodiments disclosed herein include package substrates with filter architectures. In an embodiment, a package substrate comprises a core with a first surface and a second surface, and a filter embedded in the core. In an embodiment, the filter comprises a ground plane, where the ground plane is substantially orthogonal to the first surface of the core, and a resonator adjacent to the ground plane.

An electronic device includes an antenna module including an antenna array, a radio frequency integrated circuit (RFIC) connected with the antenna array and a flexible printed circuit board connected with the RFIC, a connector disposed on the flexible printed circuit board, a communication processor disposed on a first printed circuit board, a coaxial cable electrically connecting the flexible printed circuit board and the communication processor through the connector, and a second printed circuit board configured to electrically connect the communication processor and the flexible printed circuit board. The communication processor provides a data signal to be transmitted to an external electronic device to the RFIC along a first path in the flexible printed circuit board through the coaxial cable and the connector, and provide a control signal to the RFIC along a second path in the flexible printed circuit board through the second printed circuit board.

Devices, systems, and methods for serial communication over a galvanically isolated channel are disclosed. A device includes a first IC device interface, first TO components connected to the first IC device interface, a second IC device interface, second IO components connected to the second IC device interface, an insulator layer having a first major surface and a second major surface, at least one pair of capacitor plates and corresponding interconnection paths on the first major surface, and at least one pair of capacitor plates and corresponding interconnection paths on the second major surface, wherein the at least one pair of capacitor plates on the first major surface of the insulator layer are aligned with the at least one pair of capacitor plates on the second major surface of the insulator layer to form at least one pair of capacitors.

An electronic device in provided, including an antenna using a horn structure capable of using at least a portion of a metal member as a signal waveguide structure of the antenna. The device includes a housing, a display, a printed circuit board, and at least one wireless communication circuit, where a waveguide hole is provided to connect at least a portion of a through hole and an electronic component and is used as an operating channel of the electronic component together with the waveguide hole.

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

A filter includes a first input/output electrode and the second input/output electrode, and is arranged on a first main surface of a mounting substrate. The mounting substrate includes a first land electrode, a second land electrode, a ground terminal, and a plurality of via conductors. The first land electrode is connected to the first input/output electrode. The second land electrode is connected to the second input/output electrode. The ground terminal is located closer to a second main surface side than the first main surface in a thickness direction of the mounting substrate. The plurality of via conductors is arranged between the first main surface and the second main surface, and is connected to the ground terminal. The plurality of via conductors is located between the first land electrode and the second land electrode in a plan view from the thickness direction of the mounting substrate.

An apparatus is provided that includes a die stack having a first die and a second die disposed above a substrate, and a capacitor die disposed in the die stack between the first die and the second die. The capacitor die includes a plurality of integrated circuit capacitors that are configured to be selectively coupled together to form a desired capacitor value coupled to at least one of the first die and the second die.