An RFID tag substrate includes an insulating substrate that has a mounting region in which a semiconductor device is disposed, the mounting region being included in a first surface of the insulating substrate, and a coil that is positioned at an outer edge portion of the insulating substrate. The coil includes a plurality of first coil conductors and a plurality of second coil conductors that are wound such that the first coil conductors and the second coil conductors each have the same number of turns and such that a direction in which the first coil conductors are wound and a direction in which the second coil conductors are wound are opposite to each other. The first coil conductors and the second coil conductors are alternately arranged in a thickness direction of the insulating substrate and connected in series to one another.

An electronic device and a method for manufacturing such an electronic device are described. The electronic device includes an electronic component, and a component carrier in which the electronic component is embedded. The component carrier includes a first component carrier part having a first cut-out portion and a second component carrier part having a second cut-out portion, the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component. An electrically conductive material is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion. The first cut-out portion and the second cut-out portion respectively form a first cavity and a second cavity on opposite sides of the electronic component.

The invention relates to an electrical filter element (1) for filtering alternating voltage interference. The electrical filter element (1) comprises two dielectric circuit board substrates (11, 12) having a magnetic core (13) arranged between the circuit board substrates. The magnetic core (13) has a material-free inner region (13a), in which electrical connection elements (21-24) are provided between the two dielectric circuit board substrates (11, 12). Furthermore, electrical connection elements (31, 32) can also be provided between the two dielectric circuit board substrates (11, 12) in an outer region of the magnetic core (13).

A structure includes: a base that includes a first surface and a second surface parallel to a first plane, a third surface and a fourth surface parallel to a second plane orthogonal to the first plane, and a fifth surface and a sixth surface parallel to a third plane orthogonal to the first plane and the second plane; a first conductor that expands along the third plane and that extends along a second direction; a second conductor that expands along the fourth plane and that extends along the second direction; a third conductor that expands along the first plane and that is configured to capacitively connect the first conductor and the second conductor; and a fourth conductor that is configured to be electrically connected to the first conductor and the second conductor. The first conductor, the second conductor, and the third conductor are at least partially exposed to exterior space.

The disclosure provides an electronic device. The electronic device includes a plurality of units. Each of the units includes an integrated substrate. The integrated substrate includes a first dielectric layer, a first conductive layer, a second dielectric layer, and a second conductive layer. The first dielectric layer has a first side and a second side opposite to the first side. The first conductive layer is disposed on the first side. The second dielectric layer has a third side facing the second side and a fourth side opposite to the third side. The second conductive layer is disposed on the fourth side. A loss tangent of at least one of the first dielectric layer and the second dielectric layer is less than or equal to 0.1 and greater than 0. The electronic device of an embodiment of the disclosure may improve product yield.

A radio-frequency module includes a mounting board, a first electronic component, and a second electronic component. The second electronic component is lower in height than the first electronic component. The mounting board includes dielectric layers, conductive layers, and via-conductors. In the mounting board, the dielectric layers and the conductive layers are stacked in the thickness direction of the mounting board. The mounting board has a first region and a second region. The first region overlaps the first electronic component and extends from a first major surface to a second major surface. The second region overlaps the second electronic component and extends from the first major surface to the second major surface. In the mounting board, the conductive layers in the first region are fewer than the conductive layers in the second region. In the mounting board, the first region is thinner than the second region.

An embodiment of a dual-path amplifier includes a power splitter connected to first and second power amplifiers respectively connected to first and second transmission lines connected to a power combiner having a phase-offset deficit at the second harmonic frequency 2f0, where the first and second transmission lines are designed to provide a complementary phase offset at 2f0 substantially equal to the phase-offset deficit such that the two amplified signals will be combined at the power converter with a total phase offset at 2f0 of about 180 degrees in order to reduce harmonic distortion in the amplified output signal, without substantially diminishing the output power at the fundamental frequency f0. In certain PCB-based implementations, the transmission lines include metal traces and lumped elements providing different impedance transformations that achieve the complementary phase offset, where the metal traces may have significantly different physical and electrical characteristics.

A high-frequency line substrate is mounted on a printed circuit board. The printed circuit board includes a first high-frequency line. The high-frequency line substrate includes a second high-frequency line and lead pins that connect the first high-frequency line and the second high-frequency line. At the contact portions between the signal lead pins and the second high-frequency line of the high-frequency line substrate, and at the contact portions between the ground lead pins and the second high-frequency line of the high-frequency line substrate, the height of the ground lead pins from an upper surface of the printed circuit board is greater than the height of the signal lead pins.

A stack for fabricating an integrated circuit intended to perform an electromagnetic-lens function for a reconfigurable transmitarray antenna, the stack including in succession: a substrate that includes a set of first active components configured to generate a phase shift, and that has first and second opposite surfaces, the first active components being integrated monolithically into the substrate; a metal layer, forming a ground plane on the first surface of the substrate; a layer of a cured polymer, formed on the metal layer; vias that are electrically insulated from the metal layer and that are arranged to electrically connect pairs of planar antennas, each electrically connected pair of planar antennas including first and second planar antennas that are aligned along the normal to the first and second surfaces of the substrate.

A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the substrate is reduced by one or more non-conductive voids though the thickness of the conductive portion of the land pad. The voids may allow the contact area of the land pad, as defined by the perimeter of the land pad, to remain the same while reducing the conductive portion that overlaps the parallel ground plane. Capacitance between the land pad and the parallel ground plane is reduced by an amount proportional to the reduction in overlapping conductive area.