A control substrate includes: a reverse connection protection circuit; a first substrate wiring connected with a source terminal of a MOSFET of the reverse connection protection circuit; a second substrate wiring connected with a GND terminal; a bypass circuit, allowing, in a case where an output voltage of a vehicle-mounted battery is equal to or greater than a predetermined value, a current to flow from the first substrate wiring to the second substrate wiring; and a clamp circuit, connected with a positive electrode terminal and a GND terminal on an upstream side with respect to the MOSFET and clamps a positive voltage to a second predetermined value. The first predetermined value is a value smaller than a withstand voltage between a gate and a source of the MOSFET.

Provided are a radio frequency identification tag and a method of manufacturing the same. The radio frequency identification tag includes a substrate, an antenna unit provided on the substrate and configured to transmit and receive signals, an integrated circuit unit spaced apart from the antenna unit on the substrate, and an interrupter and a delay circuit unit connected in parallel between the antenna unit and the integrated circuit unit, wherein the interrupter includes a variable portion and a fixed portion opposite the variable portion, wherein the delay circuit unit includes a capacitor and a resistor.

A solid state circuit breaker assembly includes a transistor, a transient voltage suppression device, and a circuit board. The transistor and/or the transient voltage suppression device may be electrically connected to the circuit board. The solid state circuit breaker module may be configured to be connected to one or more non-scalable modules to regulate current. The solid state circuit breaker module may be configured to receive one or more scalable modules. The transistor and/or the transient voltage suppression device may be disposed on the circuit board in a substantially symmetrical configuration.

Disclosed is a printed circuit board including an overvoltage controlling element and an electronic device including the same. The printed circuit board includes a first outer layer, a second outer layer, at least one inner layer stacked between the first and second outer layers, an overvoltage controlling element comprising overvoltage controlling circuitry mounted on the first outer layer and including a plurality of terminals of which a first terminal is connected to a ground, and a conductive area configured to transfer at least a part of a first voltage applied from an external power source to an external IC and to transfer a remaining part of the first voltage to the overvoltage controlling element.

A substrate is disclosed. In an embodiment, a substrate includes a ceramic main body, an organic surface structure on at least one first outer face of the ceramic main body and outer redistribution layers integrated into the organic surface structure.

Integrated circuit device carriers and packaging assemblies which have attached decoupling capacitance are discussed herein. In one example, an assembly includes a package assembly coupled to a motherboard and comprising a carrier circuit board and an integrated circuit device coupled to a first side of the carrier circuit board. The assembly also includes decoupling capacitors for the integrated circuit device conductively coupled between the motherboard and a second side of the carrier circuit board opposite from at least a portion of a footprint of the integrated circuit device on the carrier circuit board.

Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.

A substrate for a medical device, a portion of which is brought into contact with or inserted into a subject. The substrate includes a patient circuit conductively connected to the portion that is configured to be brought into contact with or inserted into the subject, and a ground-side circuit configured to perform at least one of transmission of a signal, reception of a signal, and supply of electric power on the patient circuit. The ground-side circuit is grounded by a protective ground to ensure safety of a manipulator of the medical device. The substrate also includes an insulating layer between the patient circuit and the ground-side circuit providing insulation between the patient circuit and the ground-side circuit, and an isolated circuit provided apart from the patient circuit and the ground-side circuit on the insulating layer and having a different reference potential from the patient circuit and the ground-side circuit.

An electronic component assembly is described which comprises a stack of electronic components wherein each electronic component comprises a face and external terminations. A component stability structure is attached to at least one face. A circuit board is provided wherein the circuit board comprises circuit traces arranged for electrical engagement with the external terminations. The component stability structure mechanically engages with the circuit board and inhibits the electronic device from moving relative to the circuit board.

A protection circuit module includes an insulating substrate, a first surge withstand chip resistor mounted on a pair of first pads formed on one surface of the insulating substrate, a second surge withstand chip resistor mounted on a pair of second pads formed on the other surface of the insulating substrate, and arranged at a position on the other surface of the insulating substrate overlapping the first surge withstand chip resistor in a plan view, a first wiring coupled to one first pad, a second wiring coupled to one second pad, a third wiring coupling the other first pad and the other second pad to the same potential, and a shield wiring provided on an inner layer of the insulating substrate and arranged in a region in which at least the one first pad and the one second pad oppose each other.