H05K1/112

CIRCUIT MODULE AND POWER SUPPLY CHIP MODULE
20210249344 · 2021-08-12 · ·

Provided is a circuit module including a power supply chip module, a load chip module, and a system board. A power supply output terminal group of the power supply chip module is arranged side by side in a row along a side of the power supply chip module board, the power supply input terminal group of a load chip module includes a specific terminal group arranged in a specific row that is a row along a side of the load chip module board, and a wiring width along an arrangement direction of the power supply output terminal group of a wiring pattern in which the power supply output terminal group is connected to the system board is equal to or more than a wiring width W31 along an arrangement direction of the specific terminal group of the wiring pattern in which the specific terminal group is connected to the system board.

Electronic circuit substrate

Provided is an electronic circuit substrate in which any excess space is not necessary around an electronic component, and position deviation at a time of mounting the electronic component can be prevented with high precision. An electronic circuit substrate 100 includes a printed wiring board 10 and an electronic component 20. The printed wiring board 10 has a first land 11 and a second land 12. The electronic component 20 has a first bond portion 24 which is bonded to the first land 11 with solder, and a second bond portion 25 which is bonded to the second land 12 with solder. The bond area of the first land 11 and the first bond portion 24 is larger than the bond area of the second land 12 and the second bond portion 25. In one direction D1, the position of an outer side edge 24b of the first bond portion 24 is set so as to match the position of the outer side edge 11b of the first land 11.

Method for fabricating electronic package

An electronic package and a method for fabricating the same are provided. A resist layer and a support are formed on a first substrate having a first antenna installation area. A second substrate having a second antenna installation area is laminated on the resist layer and the support. The resist layer is then removed. The support keeps the first substrate apart from the second substrate at a distance to ensure that the antenna transmission between the first antenna installation area and the second antenna installation area can function normally.

ADAPTER BOARD AND METHOD FOR MAKING ADAPTOR BOARD
20210235581 · 2021-07-29 ·

Disclosure provides an adaptor board and a method for making the adapter board, which includes providing a mold in which a plurality of first fixing plates and second fixing plates are provided, providing a plurality of wires sequentially passed through the plurality of first fixing plates and the second fixing plate, injecting a non-conductive material into the cavity to form a body, and cutting the body along both sides of the first fixing plates and the second fixing plates to obtain a plurality of board bodies. The first fixing plates are provided with a plurality of first fixing holes, and the second fixing plates are provided with a plurality of second fixing holes. The board body includes a first surface and a second surface. A plurality of first connection pads are formed on the first surface, and a plurality of second connection pads are formed on the second surface.

Chip package structure
11094665 · 2021-08-17 ·

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

Printed wiring board and method for manufacturing printed wiring board
11089694 · 2021-08-10 · ·

A printed wiring board includes a resin insulating layer, a conductor layer formed on a surface of the resin insulating layer, an outermost insulating layer formed on the resin insulating layer such that the outermost insulating layer is covering the conductor layer and has an opening extending to the conductor layer, and a metal post formed in the opening of the outermost insulating layer such that the metal post is protruding from the outermost insulating layer.

WIRING BOARD AND ELECTRONIC DEVICE MODULE
20210242118 · 2021-08-05 · ·

A wiring board includes: a metal plate having first and second surfaces opposite to each other, and having at least one through-hole penetrating through the first and second surfaces; at least one conductive via respectively disposed in the through-hole and spaced apart from the metal plate; an insulating structure including at least one through-insulating portion disposed between the through-hole and the conductive via, and a first insulating layer and a second insulating layer extending from the through-insulating portion and disposed in first regions surrounding the conductive via, on the first surface and the second surface, respectively; at least one first upper pad disposed on the first insulating layer and electrically connected to the conductive via; at least one first lower pad disposed on the second insulating layer and electrically connected to the conductive via; a second upper pad disposed on the first surface of the metal plate; and a second lower pad disposed on the second surface of the metal plate and electrically connected to the first upper pad through the metal plate.

Thermal Management In Circuit Board Assemblies
20210227680 · 2021-07-22 · ·

Vias may be established in printed circuit boards or similar structures and filled with a monolithic metal body to promote heat transfer. Metal nanoparticle paste compositions, such as copper nanoparticle paste compositions, may provide a ready avenue for filling the vias and consolidating the metal nanoparticles under mild conditions to form each monolithic metal body. The monolithic metal body within each via can be placed in thermal contact with one or more heat sinks to promote heat transfer. Adherence of the monolithic metal bodies within the vias may be promoted by a coating upon the walls of the vias. A tin coating, for example, may be particularly suitable for promoting adherence of a monolithic metal body comprising copper.

Conductive structure including copper-phosphorous alloy and a method of manufacturing conductive structure
11842958 · 2023-12-12 ·

The present disclosure provides a multilayer wiring structure, including a plurality of dielectric layers, a plurality of conductive wiring layers interleaved with the plurality of dielectric layers, wherein the plurality of conductive wiring layers includes copper-phosphorous alloys (such as Cu.sub.3P).

MANUFACTURING METHOD OF PACKAGE STRUCTURE
20210195761 · 2021-06-24 ·

A package structure includes a metal layer, a composite layer of a non-conductor inorganic material and an organic material, a sealant, a chip, a circuit layer structure, and an insulating protective layer. The composite layer of the non-conductor inorganic material and the organic material is disposed on the metal layer. The sealant is bonded on the composite layer of the non-conductor inorganic material and the organic material. The chip is embedded in the sealant, and the chip has electrode pads. The circuit layer structure is formed on the sealant and the chip. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has conductive blind holes. The insulating protective layer is formed on the circuit layer structure. The insulating protective layer has openings, so as to expose parts of the surface of the circuit layer structure in the openings.