A package structure includes a metal layer, a composite layer of a non-conductor inorganic material and an organic material, a sealant, a chip, a circuit layer structure, and an insulating protective layer. The composite layer of the non-conductor inorganic material and the organic material is disposed on the metal layer. The sealant is bonded on the composite layer of the non-conductor inorganic material and the organic material. The chip is embedded in the sealant, and the chip has electrode pads. The circuit layer structure is formed on the sealant and the chip. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has conductive blind holes. The insulating protective layer is formed on the circuit layer structure. The insulating protective layer has openings, so as to expose parts of the surface of the circuit layer structure in the openings.

A flexible printed circuit and printed circuit board soldered structure is provided. The structure includes signal transmission lines which dispense with any through hole, thereby enhancing integrity of high-frequency signals. The special design of the signal line structure of the flexible printed circuit and the printed circuit board together provides a satisfactory high-frequency signal transmission interface and enables a soldering technique which is highly practicable and compatible with the flexible printed circuit and printed circuit board soldered structure.

A manufacturing method of a carrier structure includes: A build-up circuit layer is formed on a carrier. The build-up circuit layer includes at least one first circuit layer, at least one first dielectric layer, a second circuit layer, a second dielectric layer, and a plurality of conductive vias. The first circuit layer is located on the carrier and includes at least one first pad, which is disposed relative to at least one through hole of the carrier. The first dielectric layer is located on the first circuit layer. The second circuit layer is located on the first dielectric layer and includes at least one second pad. The second dielectric layer is located on the second circuit layer and includes at least one opening exposing the second pad. The conductive via penetrates the first dielectric layer and is electrically connected to the first circuit layer and the second circuit layer.

A display apparatus includes a display panel comprising a display substrate on which a plurality of pad terminals is disposed, and a driving unit comprising a plurality of driving terminals electrically connected to the plurality of pad terminals. Each of the plurality of pad terminals includes a stepped groove that faces a corresponding driving terminal of the plurality of driving terminals or each of the plurality of pad terminals includes an opening hole that faces the corresponding driving terminal of the plurality of driving terminals.

Provided is a display apparatus including: a display panel including a display area and a peripheral area; a printed circuit board attached to the peripheral area and including a ground portion and a test electrode spaced apart from the ground portion; a connector including a plurality of connector terminals connected to an external control apparatus and electrically connecting the printed circuit board and the external control apparatus to each other; and a cover layer arranged on the printed circuit board and covering at least a part of the printed circuit board. Accordingly, not only the display quality and reliability of the electric characteristics of the display apparatus are improved, but also a loss is reduced and a yield is improved during manufacturing processes.

A reflowable grid array (RGA) interposer includes first connection pads on a first surface of a body and second connection pads on a second surface of the body. Heating elements within the body are adjacent to the second connection pads. First interconnects within the body connect some of the second connection pads to the first connection pads. Second interconnects within the body connect pairs of the second connection pads. A motherboard assembly includes first and second components (e.g., CPU with co-processor and/or memory) and the RGA interposer. The first connection pads are in contact with motherboard contacts. The second connection pads are in contact with the first and second components. The first component passes signals directly to the motherboard by the first interconnects. The second component passes signals directly to the first component by the second interconnects but does not pass signals directly to the motherboard by the first interconnects.

A method of manufacturing package structure with following steps is disclosed herein. An insulating composite layer is formed on a metal layer of a carrier board. A chip packaging module including a sealant and a first chip embedded therein is disposed on the insulating composite layer, in which the first chip has a plurality of conductive pads. A first circuit layer module including a dielectric layer and a circuit layer is formed on the chip packaging module, in which the circuit layer is on the dielectric layer and electrically connected to the conductive pads through a conductive vias in the dielectric layer. A second chip is disposed on the first circuit layer module. A second circuit layer module is formed on the first circuit layer module and the second chip. A protecting layer is formed on the second circuit layer module.

A system on package SoP module includes a printed circuit board (PCB) having a first side and an opposing second side, a first IC attached to the first side, a second IC attached to the second side. The PCB also provides electrical paths for connecting the first IC and the second IC. Conductors by which the second IC is attached to the PCB also allow for electrical testing of the first IC when the SoP is in a system level state.

A wiring board for a fingerprint sensor includes an insulating board including insulating layers; outer strip electrodes disposed on the insulating layer in an uppermost layer, and side by side in a first direction; inner strip electrodes disposed on the insulating layer in a next layer contacting the insulating layer in the uppermost layer, and side by side in a second direction orthogonal to the first direction; a pad electrode disposed on the insulating layer in the uppermost layer, and on the inner strip electrodes and between the outer strip electrodes; and a via conductor extending through the insulating layer in an outermost layer between the pad electrode and the inner strip electrodes and electrically connecting the pad electrode and the inner strip electrodes to each other. The via conductor has an elliptical shape that is long in the first direction in top view.

Disclosed is an antenna module including a circuit board, a communication circuit disposed on one surface of the circuit board, one or more antenna elements electrically connected to the communication circuit and arranged in at least a part of the circuit board, and a connection circuit board which includes an at least partially covered opening and is disposed on the one surface of the circuit board such that the communication circuit is disposed in an inner space of the connection circuit board.