Provided are interconnect circuits and methods of forming thereof. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.

A method for manufacturing a touch sensor includes the steps of: a) forming both a first touch conductive trail pattern (TCTP) and a first auxiliary conductive trail pattern (ACTP) on a first side of a dielectric substrate; and b) forming both a second TCTP and the second ACTP on a second side of the dielectric substrate, wherein each of the first and second ACTPs has micro auxiliary conductive units electrically disposed in an area range of the first and second TOTPs, and a shading rate of the micro auxiliary conductive units is below 1%. The first and second TCTPs and the first and second ACTPs jointly constitute a touch sensor. A sheet resistance of each of the first and second TCTPs is between 80 and 150 ohm/sq, and a sheet resistance of each of the first and second ACTPs is between 0.05 and 0.2 ohm/sq.

The present publication discloses a circuit-board structure, including a conductor layer on an insulating material layer, and a conductor pattern on top of the conductor foil. A component is attached to the conductor foil and the conductor pattern, the component embedded at least in part in adhesive which attaches the component to the insulating material layer. A recess is formed in the conductor foil and the insulating material layer, and contact openings are in the insulating material layer at locations of contact areas of the component. Conductor material of the conductor foil is not present outside the conductor pattern, and the conductor foil is located between the conductor pattern and the insulating material layer.

A circuit board according to an embodiment includes an insulating layer; a protective layer disposed on the insulating layer and including an opening; and a circuit pattern disposed on an insulating layer vertically overlapping the opening of the protective layer, wherein the circuit pattern includes: a first metal layer disposed on an upper surface of the insulating layer vertically overlapping the opening of the protective layer; a second metal layer disposed on the first metal layer; and a third metal layer disposed on the second metal layer, wherein the second metal layer includes: a first portion disposed between an upper surface of the first metal layer and a lower surface of the third metal layer; and a second portion disposed between an inner wall of the opening of the protective layer and a side surface of the third metal layer.

A photosensitive resin composition according to an embodiment of the present disclosure contains: a binder polymer including a structural unit derived from a (meth)acrylate compound having a dicyclopentanyl group; a photopolymerizable compound; a photopolymerization initiator; a sensitizer having an absorption at 340 to 430 nm; and an ultraviolet absorber, in which a molar absorption coefficient of the ultraviolet absorber for light at a wavelength of 365 nm is in a range of 500 to 50000 L/(mol.Math.cm).

A manufacturing method of a metal structure is disclosed, which includes the following steps: forming a seed layer on a substrate; forming a patterned metal layer on the seed layer, wherein the patterned metal layer includes a metal member; forming a first patterned photoresist layer on the seed layer, wherein a thickness of the first patterned photoresist layer is less than a thickness of the patterned metal layer; and performing a first patterning process to the seed layer through the first patterned photoresist layer to form a patterned seed layer, wherein after the first patterning process, the metal member includes a first part and a second part, the first part is disposed between the patterned seed layer and the second part, and a width of the first part is greater than a width of the second part.

A method for manufacturing a printed circuit board according to one embodiment of the present invention includes a step of forming a resist pattern, and a step of forming a conductive pattern by using the resist pattern. The resist pattern has an acute angle portion in which an outer edge of a resist is bent to form an acute angle in a plan view. In a corner portion of the acute angle portion, an outer-side outer edge of the resist is rounded, and a radius of curvature of the outer-side outer edge is more than or equal to a distance from the outer-side outer edge to another outer edge adjacent thereto in a direction away from a center of curvature of the outer-side outer edge.

A wiring board includes an insulating layer; an insulating oxide film that is formed by forming a film of metal oxide or semimetal oxide on a surface of the insulating layer; a seed layer that is made of metal and that is stacked on the insulating oxide film; and an electrode that is made of metal and that is formed on the seed layer, wherein the insulating oxide film and the seed layer are removed from an area not overlapping the electrode to expose the insulating layer.

A multilayer substrate includes an element assembly including a second insulating layer and a first insulating layer arranged in this order from a first side to a second side with respect to a layer stacking direction, a first conductor layer on the first side of the first insulating layer and including a plated layer, and a second conductor layer on the first side of the second insulating layer. The first conductor layer includes a first connection portion and a first circuit portion, and the second conductor layer includes a second connection portion and a second circuit portion. When viewed from the layer stacking direction, the first circuit portion includes an overlapping portion which overlaps the second circuit portion. A portion of the first connection portion connected to the second connection portion has a maximum thickness greater than a maximum thickness of the overlapping portion.

A resist layer forming method includes a process of laminating a resist layer on a base at a first pressure using a laminate roller having a first temperature, and a process of pressing the resist layer against the base at a second pressure higher than the first pressure using a metal plate having a second temperature lower than the first temperature.