To provide more space for additional circuit elements (coils, capacitors) and/or to allow the accommodation of additional circuit elements required for shielding the circuits, the metallization regions are arranged one over the other in at least two metallization layers. The carrier body has a surface on which sintered metallization regions are arranged in a first metallization layer, said metallization regions carrying electronic components and/or being structured such that the metallization regions form resistors or coils. The metallization regions are covered, together with the components and/or the resistors or coils, by a ceramic plate, and optionally additional metallization regions are arranged in additional metallization layers on the ceramic plate and each metallization region is covered by a ceramic plate. Sintered metallization regions are arranged in a metallization layer for the purpose of accommodating circuit elements on the uppermost ceramic plate facing away from the cooling elements.

Copper inks are provided that include a plurality of core-shell nanostructures, with each nanostructure including a copper core and a barrier metal shell, a diameter of less than about 500 nm, and a distinct boundary between the copper core and the barrier metal shell. Methods of forming a copper ink are further provided and include an initial step of synthesizing an amount of copper nanoparticles in an aqueous solution. An amount of a barrier metal is then added to the copper nanoparticles to form a dispersion of the barrier metal and the copper nanoparticles, and a reducing agent is subsequently added to the dispersion to produce a copper ink comprising core-shell nanostructures having a copper core and a barrier metal shell. Copper films are then formed by applying that copper ink to a substrate and sintering the copper ink.

A wiring board and a method for manufacturing the wiring board in which an initial Cu plated layer is formed by plating so as to cover the surface of a metallized layer and then the initial Cu plated layer is heated to be softened or melted. Copper in the softened or melted initial Cu plated layer enters into open pore portions of the metallized layer. In addition, during the heating, components of the metallized layer and components of the initial Cu plated layer are mutually thermally diffused. Consequently, when solidified later (that is, when the initial Cu plated layer becomes a lower Cu plated layer), the adhesiveness between the metallized layer and the lower Cu plated layer is improved due to, for example, an anchoring effect and a mutual thermal diffusion effect.

Electrical insulating properties between adjacent copper plates are improved while a defect of a bonded substrate which is caused by concentration of stress to end portions of the copper plates is prevented. A bonded substrate includes a silicon nitride ceramic substrate, a copper plate, and a bonding layer. The copper plate and the bonding layer are disposed on the silicon nitride ceramic substrate. The bonding layer bonds the copper plate to the silicon nitride ceramic substrate. The bonding layer includes: an interplate portion between the silicon nitride ceramic substrate and the copper plate; and a protruding portion protruding from between the silicon nitride ceramic substrate and the copper plate. Exposure of the silicon nitride ceramic substrate is prevented at a position where the protruding portion is disposed.

A ceramic wiring board that includes a ceramic insulator and a via-conductor. The ceramic insulator includes a crystalline constituent and an amorphous constituent. The via-conductor includes a metal and an oxide. The crystalline constituent and the oxide include at least one metal element in common. A tubular region having a thickness of 5 μm adjoins and surrounds the via-conductor and has a higher concentration of the metal element than the ceramic insulator.

A conductive pattern having high dispersion stability and a low resistance over a board is formed. A dispersing element (1) contains a copper oxide (2), a dispersing agent (3), and a reductant. Content of the reductant is in a range of a following formula (1). Content of the dispersing agent is in a range of a following formula (2).
0.0001≤(reductant mass/copper oxide mass)≤0.10  (1)
0.0050≤(dispersing agent mass/copper oxide mass)≤0.30  (2) The dispersing element containing the reductant promotes reduction of copper oxide to copper in firing and promotes sintering of the copper.

The disclosure provides for methods of making electrically conductive apparatus, such as circuit boards. The methods include 3D-printing a ceramic material into a ceramic substrate that includes a void. A conductive material is infused into the void. The conductive materiel forms electrically conductive connections within the apparatus. Also disclosed are apparatus formed by the methods.

The glass ceramic material of the present disclosure contains a glass that contains SiO.sub.2, B.sub.2O.sub.3, Al.sub.2O.sub.3, and M.sub.2O, where M is an alkali metal, and a filler that contains quartz, Al.sub.2O.sub.3, and ZrO.sub.2. The glass ceramic material contains the glass in an amount of 57.4% by weight or more and 67.4% by weight or less, the quartz in the filler in an amount of 29% by weight or more and 39% by weight or less, the Al.sub.2O.sub.3 in the filler in an amount of 1.8% by weight or more and 5% by weight or less, and the ZrO.sub.2 in the filler in an amount of 0.3% by weight or more and 1.8% by weight or less.

A method of manufacturing a conductive element is disclosed. The method being executed by an additive manufacturing system and comprises: dispensing a modeling material on a receiving medium to form a layer, and dispensing a conductive ink on the layer of modeling material to form a conductive element. In some embodiments of the invention the modeling material comprises a sintering inducing agent, and in some embodiments of the present invention a sintering inducing composition is dispensed separately from the modeling material and separately from the conductive ink.

A method of fabricating at least one electronic circuit component comprises: patterning a conductive material on a fibrous substrate by aerosol jet printing in a pattern corresponding to said at least one electronic circuit component; and sintering the conductive material by hot air sintering. The fibrous substrate may be paper, for example cellulose fibre paper.