A method for manufacturing a wiring board in which the adhesion between an underlayer and a seed layer is improved. A diffusion layer in which an element forming the underlayer and an element forming a coating layer are mutually diffused is formed between the underlayer and a wiring portion of the coating layer by irradiating the wiring portion with a laser beam. A seed layer is formed by removing a portion excluding the wiring portion of the coating layer from the underlayer. A metal layer is formed by disposing a solid electrolyte membrane between an anode and the seed layer and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from an insulating substrate.

A component carrier including an electrically insulating core, at least one electronic component embedded in the core, and a coupling structure with at least one electrically conductive through-connection extending at least partially therethrough and having a component contacting end and a wiring contacting end. The electronic component directly contacts the component contacting end. The wiring contacting end is directly electrically contacted to the wiring structure. The exterior surface portion of the coupling structure has homogeneous ablation properties and surface recesses filled with an electrically conductive wiring structure. A method includes embedding an electronic component in an electrically insulating core, providing a coupling structure with a conductive connection having a component end and a wiring end, connecting the electronic component directly to the component end, providing a surface portion of the coupling structure with homogeneous ablation properties, patterning the surface portion with recesses and filling the recesses with a wiring structure such that the wiring end is contacted directly.

A method for manufacturing a printed-wiring assembly is provided. The method includes a first step of forming a first pattern of printed wiring extending to an end face of a substrate by copper or silver on the substrate. The method includes a second step of cutting the first pattern into a first portion on the end face side from a predetermined position and a second portion on the inner side of the predetermined position, and the cut surface in the second portion is inclined by a predetermined angle with respect to a surface perpendicular to the substrate. The method further includes a third step of forming a protective layer of the second portion so as to cover the cut surface.

Disclosed herein is a method for manufacturing a planar coil, the method including forming a base conductive layer on a base material, the base conductive layer including: a coil wiring portion having one end, other end, and first to third connecting positions, the second connecting position being closer to the other end compared with the first connecting position, the third connecting position being closer to the one end compared with the second connecting position; a power-feed wiring portion that connects the first connecting position with an external power source; and a connection wiring portion that short-circuits the second connecting position and the third connecting position; forming a wiring conductive layer on the base conductive layer by electrolytic plating by feeding power from the external power source; and removing the power-feed wiring portion and the connection wiring portion.

In some embodiments, a manufacturing process includes injection molding a palladium-catalyzed material into a substrate, forming a thin copper film over exterior and exposed surfaces of the substrate; ablating or removing copper film from the substrate to provide first, second and optional third portions of the copper film and ablated sections; electrolytically plating each portion to form metallic-plated portions; and ablating or removing the second portion in order to isolate the first portion. The metallic-plated first portion comprises a circuit portion of a molded interconnect device (MID), and where the metallic-plated third portion comprises a Faraday cage portion of a MID. A soft etching step may be included. A solder resist application step can be added, along with an associated solder resist removal step.

Apparatuses and methods for forming serial advanced technology attachment (SATA) board edge connectors with electroplated hard gold contacts. One example method can include forming a tie bar on an inner layer of a printed circuit board (PCB), forming a trace on an outer layer of the PCB, forming a via, wherein the via electrically couples the tie bar to the trace, forming a contact coupled to the trace on the outer layer, and sending an electrical charge from the tie bar through the via and the trace to the contact to electroplate the contact.

A patterned conductive article 200 includes a substrate 210 including a unitary layer 210-1 and includes a micropattern of conductive traces 220 embedded at least partially in the unitary layer. Each conductive trace extends along a longitudinal direction (y-direction) of the conductive trace and includes a conductive seed layer 230 having a top major surface 232 and an opposite bottom major surface 234 in direct contact with the unitary layer; and a unitary conductive body 240 disposed on the top major surface of the conductive seed layer. The unitary conductive body and the conductive seed layer differ in at least one of composition or crystal morphology. The unitary conductive body has lateral sidewalls 242, 244 and at least a majority of a total area of the lateral sidewalls is in direct contact with the unitary layer.

Apparatuses and methods for forming serial advanced technology attachment (SATA) board edge connectors with electroplated hard gold contacts. One example method can include forming a tie bar on an inner layer of a printed circuit board (PCB), forming a trace on an outer layer of the PCB, forming a via, wherein the via electrically couples the tie bar to the trace, forming a contact coupled to the trace on the outer layer, and sending an electrical charge from the tie bar through the via and the trace to the contact to electroplate the contact.

A method of forming a wiring pattern includes: a) forming a metal underlayer including a first underlying wiring layer which is in contact with an electrode, a second underlying wiring layer which is not in contact with the electrode, and an underlying connection layer which connects the first underlying wiring layer to the second underlying wiring layer; b) forming a metal plating layer on the metal underlayer through electroplating; and c) removing a metal connection portion through etching. The metal connection portion is the underlying connection layer covered with the metal plating layer. The etching includes bringing a solid electrolyte material that contains a solution into which metal of the metal connection portion is dissolved, into contact with the metal connection portion and applying a voltage between the metal connection portion and the solid electrolyte material.

A patterned conductive article includes a substrate having a first groove therein; a conductive seed layer disposed in the first groove; and a unitary conductive body disposed at least partially in the first groove. The conductive seed layer covers at least a majority of a bottom surface of the first groove, and the unitary conductive body covers the conductive seed layer and at least a majority of side surfaces of the first groove. In a plane through the unitary conductive body that is parallel to and separate from the conductive seed layer, the unitary conductive body has a lower first line edge roughness at a first interface with the side surfaces and the conductive seed layer has a higher second line edge roughness at an edge of the conductive seed layer.