A circuit board includes: an insulating layer having at least a part formed of an insulating resin; and an electrode pad embedded in the insulating layer and having a neck formed on an outer side surface, the neck being held in contact with the insulating resin of the insulating layer. The electrode pad includes: a first conductor layer having an end surface exposed from one surface of the insulating layer; and a second conductor layer formed on the first conductor layer and having a grain boundary density different from a grain boundary density of the first conductor layer. The neck is formed in a region of the outer side surface, the region corresponding to a boundary part between the first conductor layer and the second conductor layer.

In at least one illustrative embodiment, a printed circuit board may comprise at least one insulating layer, first and second conductive layers separated from one another by the at least one insulating layer, and a conductive via extending through the at least one insulating layer and electrically coupling the first and second conductive layers. The conductive via may include an annular via sidewall having an average radial thickness of at least 2.5 mils (0.0025 inches) and a conductive pad having an average thickness of no more than 3.2 mils (0.0032 inches).

An inductor built-in substrate includes a core substrate having openings and first through holes, a magnetic resin filled in the openings and having second through holes, first through-hole conductors formed in the first through holes respectively such that each of the first through-hole conductors includes a metal film, second through-hole conductors formed in the second through holes respectively such that each of the second through-hole conductors includes a metal film, first through-hole lands formed on the core substrate such that each of the first through-hole lands includes a lowermost layer including a metal foil and that the first through-hole lands are connected to the first through-hole conductors respectively, and second through-hole lands formed on the magnetic resin such that each of the second through-hole lands includes a lowermost layer including a plating film and that the second through-hole lands are connected to the second through-hole conductors respectively.

An inductor built-in substrate includes a core substrate having openings and first through holes, a magnetic resin filled in the openings and having second through holes, first through-hole conductors formed in the first through holes respectively such that each of the first through-hole conductors includes a metal film, second through-hole conductors formed in the second through holes respectively such that each of the second through-hole conductors includes a metal film, first through-hole lands formed on the core substrate such that each of the first through-hole lands includes a lowermost layer including a metal foil and that the first through-hole lands are connected to the first through-hole conductors respectively, and second through-hole lands formed on the magnetic resin such that each of the second through-hole lands includes a lowermost layer including a plating film and that the second through-hole lands are connected to the second through-hole conductors respectively.

The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component including a terminal made of a first electrically conductive material and being embedded in the stack, a recess in the stack exposing at least a part of the terminal, an interface structure on the at least partially exposed terminal and an electrically conductive structure on the interface structure made of a second electrically conductive material.

A method for producing a wired circuit board, the method including the steps of: a first step of providing an insulating layer having an opening penetrating in the thickness direction at one side surface in the thickness direction of the metal plate, a second step of providing a first barrier layer at one side surface in the thickness direction of the metal plate exposed from the opening by plating, a third step of providing a second barrier layer continuously at one side in the thickness direction of the first barrier layer and an inner surface of the insulating layer facing the opening, a fourth step of providing a conductor layer so as to contact the second barrier layer, and a fifth step of removing the metal plate by etching.

A ceramic circuit board and a method of making are provided. The ceramic circuit board includes a substrate and a composite material layer. The composite material layer is formed on the substrate and comprises metal oxide powders and ceramic powders. The composite material layer has an interface layer which is transformed from the metal oxide powders by reduction and includes comprises zero-valent metal, lower-valent metal oxide and eutectic mixture reduced from the metal oxide powders of the composite material layer.

A semiconductor manufacturing apparatus according to an embodiment comprises a container contains a mixed solution that includes a processing solution for plating processing of a substrate and an additive and being capable of draining a part of the mixed solution when a first condition is satisfied. A first supplier supplies the processing solution to the container. A second supplier supplies the additive to the container when the first condition is satisfied and drainage of a part of the mixed solution is finished.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.