Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board according to a preferred embodiment of the present invention includes a base substrate; a through via formed to penetrate through the base substrate; and circuit patterns formed on one side and the other side of the base substrate and formed to be thinner than an inner wall of the through via.

An integrated circuit device, such as a system-on-a-chip (SOC) device that includes an integrated or embedded voltage regulator, comprises an integrated capacitor and an integrated inductor having a magnetic core that can be fabricated in the same process as the capacitive structure of the integrated capacitor.

A substrate includes a plurality of vias that are lined with dielectric polymer having a substantially uniform thickness. This substantial uniform thickness provides a lumen within each dielectric-polymer-layer-lined via that is substantially centered within the via. Subsequent deposition of metal into the lumen for each dielectric-polymer-layer-lined via thus provides conductive vias having substantially centered metal conductors.

A multilayer circuit board includes a first substrate and a second substrate in stack. The first substrate is provided with a first pad, a second pad, and a first sub-circuit. The first pad and the second pad are electrically connected to the first sub-circuit. The second substrate has a top surface, a bottom surface, and an opening. The bottom surface of the second substrate is attached to the top surface of the first substrate. The opening extends from the top surface to the bottom surface of the second substrate. The first pad of the first substrate is in the opening of the second substrate; the second pad of the first substrate is not covered by the second substrate. The second substrate further provided with a pad on the top surface and a second sub-circuit electrically connected to the pad of the second substrate.

A circuit board according to an embodiment comprises: an insulation layer; a circuit pattern disposed on the upper surface or under the lower surface of the insulation layer; and a buffer layer disposed on at least one surface of the upper surface and the lower surface of the insulation layer, wherein the buffer layer includes carbon, nitrogen, and oxygen, the ratio of the nitrogen to the carbon ((carbon/nitrogen)*100) is 5 to 15, and the ratio of the oxygen to the carbon ((carbon/oxygen)*100) is 15 to 30.

A structure of via hole of electrical circuit board includes an adhesive layer and a conductor layer that are formed after wiring is formed on a carrier board. At least one through hole extends in a vertical direction through the carrier board, the wiring, the adhesive layer, and the conductor layer and forms a hole wall surface. The conductor layer shows a height difference with respect to an exposed zone of the circuit trace in the vertical direction. A conductive cover section covers the conductor layer and the hole wall surface of the through hole. The carrier board is a single-sided board, a double-sided board, a multi-layered board, or a combination thereof, and the single-sided board, the double-sided board, and multi-layered board can be flexible boards, rigid boards, or composite boards combining flexible and rigid boards.

The present invention provides a method for treating a substrate that supports metal fine particles for forming a plating layer on a circuit pattern or TSVs in various substrates, in which further micronization treatment is enabled compared with the conventional methods, and the formation of a stable plating layer is enabled. The present invention is a method for treating a substrate, the method including bringing a substrate into contact with a colloidal solution containing metal particles in order to support the metal particles that serve as a catalyst for forming a plating layer on the substrate, in which the colloidal solution contains metal particles formed of Pd and having a particle size of 0.6 nm to 4.0 nm and a face-to-face dimension of the (111) plane of 2.254 or more. When an organic layer such as SAM is formed on a surface of the substrate before this treatment, the binding force of the Pd particles can be increased.

A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes an insulating layer including a first resin layer and a second resin layer, circuit layers disposed on upper and lower surfaces of the insulating layer, and a via configured to connect the circuit layer formed on the upper surface to the circuit layer formed on the lower surface, and the second resin layer extends from an upper surface of the first resin layer to a lower surface of the first resin layer by passing through the first resin layer as to contact a side surface of the via.

A multi-layered 3D printed laser direct structuring method and apparatus for electrical interconnect and antennas. 3D printed components can be configured with structurally integrated metal connections (e.g., bulk highly conductive metal) that traverse multiple layers (some embedded and others external) of a structure fabricated using an additive manufacturing system enhanced with an iterative laser activated plating processes, which includes a novel well side-wall vertical interconnect.

A substrate includes a substrate body made of a material such as glass, and at least one electrical via that extends at least into or through the substrate body. The via is metalized with a molten metal that enters the via under capillary action and solidifies to establish electrical conductivity through the via. The melting temperature of the metal is less than the transition temperature and melting temperature of the substrate body.