Patent classifications
H05K3/4629
Electronics assemblies for downhole use
Methods, systems, devices, and products for constructing a downhole tool electronics module. Methods may include creating a circuit board by metallizing at least part of a first surface on a first side of a substrate to define at least one metallized area on the first surface, wherein the substrate comprises a ceramic material and includes: the first side, including at least (i) the first surface, and (ii) an elevated surface elevated from the first surface, and a second side opposite the first side; flattening at least partially the elevated surface to a predefined first flatness to create a mounting portion by removing material from the elevated surface; attaching an electronics component to the first surface; and mounting the circuit board on an electronics carrier by adhering at least part of the mounting portion to a mounting surface on the electronics carrier. Flattening at least partially the elevated surface to the predefined first flatness may be carried out by removing the material by areal grinding.
Multilayer ceramic substrate and probe card including same
A multilayer structure includes a first insulating layer including a first body of an anodized oxide material, a first via conductor penetrating through the first body, and a first internal wiring layer electrically connected to the first via conductor, a second insulating layer including a second body of the anodized oxide material, a second via conductor penetrating through the second body, and a second connection pad electrically connected to the second via conductor, and a solder hump provided on one of the first internal wiring layer and the second connection pad and between the first insulating layer and the second insulating layer. The first via conductor, the first internal wiring layer, the second connection pad, and the second via conductor are electrically connected to each other through the solder bump.
CERAMIC LAMINATED SUBSTRATE, MODULE, AND METHOD OF MANUFACTURING CERAMIC LAMINATED SUBSTRATE
Provided is a ceramic laminated substrate which is formed on an electronic component to be mounted and is less likely to cause mounting defects even if there is irregularity in the height of solders. The ceramic laminated substrate includes: a ceramic laminate on which ceramic layers are laminated; via conductors; terminal electrodes; and a land electrode. The land electrode has a first land electrode and a second land electrode that are used to join different terminal electrodes of a single electronic component. The area of the first land electrode is smaller than the area of the second land electrode, and the first land electrode has a bump electrode and a plating layer, the second land electrode has a membrane electrode and plating layers, and the height of the first land electrode is formed higher than the height of the second land electrode.
Method of fabricating a glass substrate with a plurality of vias
Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.
Rapid implementation of high-temperature analog interface electronics
A multi-layer ceramic wiring board is patterned with arrays of footprints for high-temperature surface mounted device active and passive components on one side of the board that is patterned with arrays of standard SMD footprints to enable placement and attachment of components including primary 2-terminal components and active components where the SMD pads are connected through vias and buried-layer interconnect traces to a multiple connection point arrays on the front and back side of the ceramic wiring board. Each pad is connected to multiple instances of the pad grid to connections to be made with a single post-fired print.
METHOD FOR MANUFACTURING CERAMIC ELECTRONIC COMPONENT
A method for manufacturing a ceramic electronic component includes: forming a ceramic laminate by stacking ceramic green sheets on which internal electrode patterns are formed; obtaining an image of an upper portion of the ceramic laminate; determining cutting regions based on the image; and cutting the ceramic laminate by irradiating the cutting regions with a laser.
Electronic component
An electronic component that has fewer cracks during production is provided. The electronic component includes an outer electrode on a multilayer body, which includes an inner glass layer, a magnetic material layer on top and bottom surfaces of the inner glass layer, and an outer glass layer on top and bottom surfaces of the magnetic material layer. The insulating layers of the inner glass layer and the outer glass layers contain a dielectric glass material that contains a glass material containing at least K, B, and Si, quartz, and alumina. The glass material content of each insulating layer of the inner glass layer ranges from approximately 60%-65% by weight, the quartz content of each insulating layer of the inner glass layer ranges from approximately 34%-37% by weight, and the alumina content of each insulating layer of the inner glass layer ranges from approximately 0.5%-4% by weight.
THREE-DIMENSIONAL INDUCTOR STRUCTURE AND STACKED SEMICONDUCTOR DEVICE INCLUDING THE SAME
A three-dimensional (3D) inductor structure comprising: a first semiconductor die including: a first conductive pattern; and a second conductive pattern spaced apart from the first conductive pattern; a second semiconductor die stacked on the first semiconductor die, the second semiconductor die including: a third conductive pattern; a fourth conductive pattern spaced apart from the third conductive pattern; a first through-substrate via (TSV) penetrating the second semiconductor die and electrically connecting the first conductive pattern with the third conductive pattern; and a second TSV penetrating the second semiconductor die and electrically connecting the second conductive pattern with the fourth conductive pattern, and a first conductive connection pattern included in the first semiconductor die and electrically connecting a first end of the first conductive pattern with a first end of the second conductive pattern, or included in the second semiconductor die and electrically connecting a first end of the third conductive pattern with a first end of the fourth conductive pattern.
STRUCTURE BODY AND METHOD OF MANUFACTURING THE SAME
A structure body includes a ceramic substrate including a first surface, a first conductor pattern arranged on the first surface, and a first columnar conductor connected to the first conductor pattern and extending in a direction of thickness in an orientation away from the ceramic substrate. The first columnar conductor is provided with a recess in an end surface on a side close to the ceramic substrate and the first surface is provided with a raised portion in conformity with the recess in a region where the first columnar conductor is superimposed.
MULTILAYER CERAMIC SUBSTRATE AND PROBE CARD INCLUDING SAME
A multilayer ceramic substrate according to the present invention includes a first insulating portion including a body of a ceramic material, a first via conductor penetrating through the body, and a first internal wiring layer and a first connection pad connected to the first via conductor; and a second insulating portion including a body of an anodized oxide material, a second via conductor penetrating through the body, and a second internal wiring layer and a second connection pad connected to the second via conductor.