Patent classifications
H05K3/4655
Multilayer circuit board and manufacturing method therefor
The present invention provides a multilayer circuit board and a method for manufacturing the same for improving a bowing problem that occurs when manufacturing the multilayer circuit board. A multilayer circuit board according to the present invention is a board having a patterned layer that functions as a circuit a base layer, and includes: a second pattern layer formed on one side of the base layer; a first pattern layer formed on the second pattern layer; and an interlayer insulating layer formed between the first pattern layer and the second pattern layer, the interlayer insulating layer being partially formed on the second pattern layer so as to correspond to a region where the first pattern layer is formed.
Multilayer ceramic substrate and electronic device
A multilayer ceramic substrate that includes a surface layer portion positioned on an internal layer portion, and a surface layer electrode on a surface of the surface layer portion. The surface layer portion includes a first layer next to the internal layer portion, and the internal layer portion includes a second layer next to the first layer. The thermal expansion coefficient of the first layer is lower than the thermal expansion coefficient of the second layer. The first layer and the second layer each contain glass containing 40 weight % to 65 weight % of MO, where MO is at least one selected from CaO, MgO, SrO, and/or BaO); 35 weight % to 60 weight % of alumina, and 1 weight % to 10 weight % of at least one metal oxide selected from CuO and/or Ag.sub.2O.
Packaged Integrated Circuit With Interposing Functionality and Method for Manufacturing Such a Packaged Integrated Circuit
A packaged integrated circuit includes a core structure with a cavity therein; a component accommodated in the cavity; an electrically insulating structure formed over the core structure and the component; a partially electrically insulating carrier structure formed below the core structure and the component; and an electrically conducting redistribution arrangement formed at least partially within the carrier structure. The redistribution arrangement includes conductor structures each having a first element extending through the carrier structure and electrically connecting a contact of the component and a second element below the carrier structure. A part of the second element is a contact pad for electrically connecting the redistribution arrangement with external circuitry. The carrier structure includes a polyimide layer and an adhesive layer. The adhesive layer is directly attached to an upper surface of the polyimide layer and to a lower surface of the core structure and a lower surface of the component.
RESIN COMPOSITION, RESIN FILM, LAMINATE, MULTILAYER PRINTED WIRING BOARD AND METHOD FOR PRODUCING MULTILAYER PRINTED WIRING BOARD
The present invention relates to a resin composition comprising a maleimide compound having a saturated or unsaturated divalent hydrocarbon group and a divalent group having at least two imido bonds; and a catalyst comprising at least one selected from the group consisting of an imidazole compound, a phosphorus compound, an azo compound and an organic peroxide.
Printed wiring board
A printed wiring board includes a core substrate, a first build-up layer, and a second build-up layer. The core substrate includes a core layer, through-hole conductors and through-hole lands. Metal foils of the through-hole lands in the core substrate have mat surfaces at interfaces of the core layer in the core substrate, metal foils of via lands in the build-up layers have inner mat surfaces at interfaces of insulating layers, and metal foils of outermost conductor layers in the build-up layers have outermost mat surfaces at interfaces of outermost insulating layers. Ten-point average roughness (RzI1) of the inner first mat surface is smaller than each often-point average roughness (Rz1, Rz2) of the mat surfaces and ten-point average roughness (RzO1, RzO2) of the outermost mat surfaces. Ten-point average roughness (RzI2) of the inner second mat surface is smaller than each of the ten-point average roughness (Rz1, Rz2, RzO1, RzO2).
COMPOSITE FILM FOR ELECTRONIC DEVICES USING HIGH FREQUENCY BAND SIGNALS, PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREFOR
A composite film for electronic device using high frequency band signals, which is low in dielectric tangent, excellent in embedding properties relative to unevenness of a circuit, etc., and excellent in surface smoothness, and has high adhesion to plated copper is provided; and a printed wiring board containing a cured material of the composite film for electronic device and a method of producing the printed wiring board are also provided. Specifically, the composite film for electronic device is a composite film for electronic device using high frequency band signals, including a layer A having a minimum melt viscosity at 80 to 150 C. of 100 to 4,000 Pa.Math.s; and a layer B having a minimum melt viscosity at 80 to 150 C. of 50,000 Pa.Math.s or more. The composite film for electronic device is low in thermal expansion properties and excellent in handling properties of film.
Resin composition, article of manufacture made therefrom and method of making the same
Disclosed is a resin composition, comprising the following components: (A) 100 parts by weight of an epoxy resin; (B) 10 to 60 parts by weight of a diamino diphenyl ether type benzoxazine resin having a softening point of 40 C. to 140 C.; (C) 10 to 40 parts by weight of a co-hardener; and (D) 10 to 40 parts by weight of a flame retardant which comprises (d1) a high melting point flame retardant with a melting point of greater than 260 C. or (d2) a metal phosphinate flame retardant, wherein the metal is selected from Group IIIA elements. Also disclosed is an article of manufacture obtained from the resin composition and a use thereof. Accordingly, the demands of high frequency application can be met, and a balance of low thermal expansion, high thermal resistance and low warpage in the system can be struck.
RESIN COMPOSITION, WIRING LAYER LAMINATE FOR SEMICONDUCTOR, AND SEMICONDUCTOR DEVICE
One aspect of the present invention relates to a resin composition comprising a curable resin and a curing agent, which is used for forming an inter-wiring layer insulating layer in contact with a copper wiring.
Printed wiring board and method for manufacturing printed wiring board
A printed wiring board includes a laminate, conductor posts formed on a surface of the laminate, and a mold resin layer formed on the surface of the laminate such that the posts are in the mold layer covering side surfaces of the posts. The laminate includes conductor layers and one or more resin insulating layers, the conductor layers includes a first conductor layer embedded in a resin insulating layer forming the surface of the laminate and has one surface exposed on the surface of the laminate, the first conductor layer includes first and second conductor pads such that the second pads are formed on outer peripheral side of the first pads, the mold layer has a cavity exposing the first pads, the posts are formed on the second pads on the surface of the laminate, and the first conductor layer includes fan-out wirings extending from inside to outside the cavity.
Method for producing package substrate for loading semiconductor device
A method for manufacturing a package substrate including an insulating layer and a wiring conductor, including: forming, on one or both sides of a core resin layer, a substrate including a peelable first metal layer that has a thickness of 1-70 ?m, a first insulating resin layer, and a second metal layer; forming a non-through hole reaching a surface of the first metal layer, performing electrolytic and/or electroless copper plating on its inner wall, and connecting the second and first metal layers; arranging a second insulating resin layer and a third metal layer and heating and pressurizing the first substrate to form a substrate; forming a non-through hole reaching a surface of the second metal layer, performing electrolytic and/or electroless copper plating on its inner wall, and connecting the second and third metal layers; peeling a third substrate; and patterning the first and third metal layers to form the wiring conductor.