Patent classifications
H05K7/1444
Power supply for a networking device with orthogonal switch bars
Power supply for a networking device may be provided. The networking device may comprise a first plurality of switch bars each comprising a first switch type arranged parallel to one another and a second plurality of switch bars each comprising a second switch type arranged parallel to one another. The first plurality of switch bars and the second plurality of switch bars may be arranged orthogonally. A first plurality of power supplies may be fed by a first source. A second plurality of power supplies may be fed by a second source. Respective ones of a first portion of the first plurality of power supplies feed first respective pairs of the first plurality of switch bars and respective ones of a first portion of the second plurality of power supplies feed second respective pairs of the first plurality of switch bars. The first respective pairs of the first plurality of switch bars may be different from the second respective pairs of the first plurality of switch bars.
Networking device with orthogonal switch bars
A networking device with orthogonal switch bars may be provided. The networking device may comprise a first plurality of switch bars comprising leaf switches arranged parallel to one another. In addition, the networking device may comprise a second plurality of switch bars comprising top of pod switches arranged parallel to one another. Furthermore, the networking device may comprise a third plurality of switch bars comprising top of fabric switches arranged parallel to one another. The first plurality of switch bars, the second plurality of switch bars, and the third plurality of switch bars may be arranged mutually orthogonally. The first plurality of switch bars may be adjacent to and connected to the second plurality of switch bars and the second plurality of switch bars may be adjacent to and connected to the third plurality of switch bars.
Systems and methods for adaptive data storage
A storage module is configured to store data segments, such as error-correcting code (ECC) codewords, within an array comprising two or more solid-state storage elements. The data segments may be arranged in a horizontal arrangement, a vertical arrangement, a hybrid channel arrangement, and/or vertical stripe arrangement within the array. The data arrangement may determine input/output performance characteristics. An optimal adaptive data storage configuration may be based on read and/or write patterns of storage clients, read time, stream time, and so on. Data of failed storage elements may be reconstructed by use of parity data and/or other ECC codewords stored within the array.
Interleaved card/riser connection assembly for compact card integration
An apparatus is described. The apparatus includes a first riser card connected to a first card. The apparatus also includes a second riser card connected to a second card, wherein, the first card's connection to the first riser card and the second card's connection to the second riser card pass through a vertical plane runs parallel to respective surfaces of the first and second riser cards.
INTERLEAVED CARD/RISER CONNECTION ASSEMBLY FOR COMPACT CARD INTEGRATION
An apparatus is described. The apparatus includes a first riser card connected to a first card. The apparatus also includes a second riser card connected to a second card, wherein, the first card's connection to the first riser card and the second card's connection to the second riser card pass through a vertical plane runs parallel to respective surfaces of the first and second riser cards.
Distributed core switching with orthogonal fabric card and line cards
A network device is provided. The device includes a housing and a switch card, mounted within the housing and having one or more connectors. A plurality of line cards are oriented parallel to each other and orthogonal to the switch card and assembled to the one or more connectors of the switch card. The switch card has a chip, with a plurality of switches or routing paths, and the switch card and the chip couple to the plurality of line cards through the one or more connectors.
High-density, fail-in-place switches for computer and data networks
A structure for a network switch. The network switch may include a plurality of spine chips arranged on a plurality of spine cards, where one or more spine chips are located on each spine card; and a plurality of leaf chips arranged on a plurality of leaf cards, wherein one or more leaf chips are located on each leaf card, where each spine card is connected to every leaf chip and the plurality of spine chips are surrounded on at least two sides by leaf cards.
APPARATUS FOR MOUNTING PROCESSORS FOR CLUSTER COMPUTING
A bracket for mounting a processor and a support structure for receiving bracket-supported processors for cluster computing are provided. In some embodiments, a bracket may be configured to receive a processor and fasten the processor to the bracket. The bracket may be configured to mount the processor to a support structure. The support structure may be configured to receive an array of brackets. The support structure may be configured to be stacked in combination with additional support structures.
DISTRIBUTED CORE SWITCHING WITH ORTHOGONAL FABRIC CARD AND LINE CARDS
A network device is provided. The device includes a housing and a switch card, mounted within the housing and having one or more connectors. A plurality of line cards are oriented parallel to each other and orthogonal to the switch card and assembled to the one or more connectors of the switch card. The switch card has a chip, with a plurality of switches or routing paths, and the switch card and the chip couple to the plurality of line cards through the one or more connectors.
Riser cards with inline slots
In example implementations, an apparatus is provided. The apparatus includes a riser card body, a first interface, a first 28 slot on a surface of the riser card body, and a second 28 slot on a same side of the surface of the riser card body as the first 28 slot. The first interface includes a first set of fingers and a second set of fingers at an end of the riser card body to connect to a peripheral component interconnect express (PCIe) slot of a motherboard. The first 28 slot and the second 28 slot are positioned perpendicular to the PCIe slot of the motherboard.