A method for manufacturing electrically conductive structures, preferably conductive pathway structures using laser beams on a non-conductive carrier (LDS method), wherein a non-conductive carrier material is provided which contains at least one inorganic metal phosphate compound and at least one stabiliser finely distributed or dissolved therein, the carrier material is irradiated in regions by laser beams generating the electrically conductive structures in the irradiated regions.

The thermosetting resin composition for LDS of the invention includes a thermosetting resin, an inorganic filler, a non-conductive metal compound that forms a metal nucleus upon irradiation with active energy rays, and a coupling agent, in which the non-conductive metal compound includes one or more selected from the group consisting of a spinel-type metal oxide, a metal oxide having two or more transition metal elements in groups adjacent to each other, the groups being selected from groups 3 to 12 of the periodic table, and a tin-containing oxide, and the coupling agent includes one or more selected from the group consisting of mercaptosilane, aminosilane, and epoxysilane.

A method of forming a molded interconnect device (MID) is provided. The method includes the steps of performing a molding stage, performing a circuit forming stage, and performing a plate stage. As a part of the molding stage, a palladium-catalyzed material is injection molded into a palladium-catalyzed substrate of a desired shape. As a part of the circuit forming stage, both a metallization step and a circuit patterning step are performed. As a part of the plating stage, both an electrolytic plating step and a circuit isolation step are performed.

Light reflection from a metal mesh touch sensor is reduced or prevented by encasing the metal lines with a passivation coating and including non-reflective nanoparticles in the patterning photoresist. The photoresist is mixed with catalytic nanoparticles wherein the nanoparticles are formed to minimize light reflection. The nanoparticles may be carbon coated metallic particles, or uncoated palladium nanoparticles. Also, a standoff photoresist layer may be included between the substrate and the photoresist composition to prevent reflection from the edges of the metallic lines.

A wiring substrate includes a substrate containing a resin as a main component and including a mixed layer in which the resin and a catalyst are mixed together; and a metal wire disposed to cover the mixed layer and being in contact with the catalyst. The wiring substrate with such a configuration can increase the adhesion of the metal wire to the substrate.

A circuit structure that comprises a substrate and one or more conductive elements disposed on the substrate is provided. The substrate comprises a polymer composition that comprises an electrically conductive filler distributed within a polymer matrix. The polymer matrix contains at least one thermoplastic high performance polymer having a deflection temperature under load of about 40° C. or more as determined in accordance with ISO 75-2:2013 at a load of 1.8 MPa, and the polymer composition exhibits a dielectric constant of about 4 or more and a dissipation factor of about 0.3 or less, as determined at a frequency of 2 GHz.

Light reflection from a metal mesh touch sensor is reduced or prevented by encasing the metal lines with a passivation coating and including non-reflective nanoparticles in the patterning photoresist. The photoresist is mixed with catalytic nanoparticles wherein the nanoparticles are formed to minimize light reflection. The nanoparticles may be carbon coated metallic particles, or uncoated palladium nanoparticles. Also, a standoff photoresist layer may be included between the substrate and the photoresist composition to prevent reflection from the edges of the metallic lines.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and blanket surface plasma etch operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.

A process for making a circuit board from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth includes drilling holes, etching the surface to expose the catalytic particles, electroless plating the unmasked areas, applying a mask to the etched surface, electroplating the exposed areas using the electroless plating to form a continuous conductor, then stripping the mask and etching away the electroless copper deposition.