Patent classifications
H05K2201/0236
Via in a printed circuit board
A via in a printed circuit board is composed of a patterned metal layer that extends through a hole in dielectric laminate material that has been covered with catalytic adhesive material on both faces of the dielectric laminate material. The layer of catalytic adhesive coats a portion of the dielectric laminate material around the hole. The patterned metal layer is placed over the catalytic adhesive material on both faces of the dielectric laminate material and within the hole.
Composition and method for forming conductive pattern, and resin structure having conductive pattern thereon
The present invention relates to a composition for forming a conductive pattern which is capable of forming a fine conductive pattern reducing deterioration of mechanical-physical properties and having excellent adhesion strength onto a variety of polymeric resin products or resin layers, a method for forming the conductive pattern using the same, and a resin structure having the conductive pattern. The composition for forming a conductive pattern includes a polymer resin; and non-conductive metal compound particles including a first metal element and a second metal element, having a R
Embedded circuit patterning feature selective electroless copper plating
Embodiments describe the selective electroless plating of dielectric layers. According to an embodiment, a dielectric layer is patterned to form one or more patterned surfaces. A seed layer is then selectively formed along the patterned surfaces of the dielectric layer. An electroless plating process is used to deposit metal only on the patterned surfaces of the dielectric layer. According to an embodiment, the dielectric layer is doped with an activator precursor. Laser assisted local activation is performed on the patterned surfaces of the dielectric layer in order to selectively form a seed layer only on the patterned surfaces of the dielectric layer by reducing the activator precursor to an oxidation state of zero. According to an additional embodiment, a seed layer is selectively formed on the patterned surfaces of the dielectric layer with a colloidal or ionic seeding solution.
Methods for forming embedded traces
A printed circuit board includes a laminate substrate. The laminate substrate includes catalytic core material that resists metal plating except where a surface of the catalytic material is ablated. Metal traces are formed within in trace channels within the laminate substrate. The channels extend below the surface of the catalytic material.
COMPOSITION FOR FORMING CONDUCTIVE PATTERN, METHOD OF FORMING CONDUCTIVE PATTERN USING THE SAME, AND RESIN STRUCTURE HAVING CONDUCTIVE PATTERN
Provided are a composition for forming a conductive pattern, which enables formation of a fine conductive pattern onto a variety of polymer resin products or resin layers by a very simplified process, a method of forming the conductive pattern using the same, and a resin structure having the conductive pattern. The composition for forming the conductive pattern includes a polymer resin; and a non-conductive metal compound including a coinage metal element [Group 11 (Group IB)] and a non-metal element, the non-conductive metal compound having a three-dimensional structure formed by vertex sharing of tetrahedrons including the Group 11 metal element, in which a metal core including the Group 11 metal element or an ion thereof is formed from the non-conductive metal compound by electromagnetic irradiation.
SEMICONDUCTOR STRUCTURE
A semiconductor structure includes an insulating layer, a plurality of stepped conductive vias and a patterned circuit layer. The insulating layer includes a top surface and a bottom surface opposite to the top surface. The stepped conductive vias are disposed at the insulating layer to electrically connect the top surface and the bottom surface. Each of the stepped conductive vias includes a head portion and a neck portion connected to the head portion. The head portion is disposed on the top surface, and an upper surface of the head portion is coplanar with the top surface. A minimum diameter of the head portion is greater than a maximum diameter of the neck portion. The patterned circuit layer is disposed on the top surface and electrically connected to the stepped conductive vias.
Thermoplastic resin composition, resin molded article, and method for manufacturing resin molded article having a plated layer
Provide is a thermoplastic resin composition from which a resin molded article having high whiteness and mechanical strength can be obtained while retaining the plating properties of the resin molded article. A thermoplastic resin composition comprising a thermoplastic resin, and 1 to 30 parts by weight of a laser direct structuring additive, 0.1 to 20 parts by weight of a titanium oxide and 10 to 230 parts by weight of a glass fiber per 100 parts by weight of the thermoplastic resin, wherein the laser direct structuring additive has an L value of 50 or more, and the glass fiber comprises SiO.sub.2 and Al.sub.2O.sub.3 in a proportion of 60 to 70% by weight of SiO.sub.2 and 20 to 30% by weight of Al.sub.2O.sub.3.
RESIN COMPOSITION FOR PERMANENT INSULATING FILM, PERMANENT INSULATING FILM, MULTILAYER PRINTED WIRING BOARD, AND PROCESS FOR PRODUCING THE SAME
A resin composition for a permanent insulating film is provided, by which, in particular, partial through-holes obtained by partitioning a through-hole can be easily and precisely formed as designed without a deposition of catalytic species (seed) in a plating resist portion. The present invention provides a resin composition for a permanent insulating film, including a thermosetting resin, a resin filler, and a compound containing at least one atom selected from a sulfur atom and a nitrogen atom. The present invention also provides a multilayer printed wiring board in which conductive layers having a circuit pattern and insulation layers are alternately overlaid with each other, and a through-hole enabling electric conductivity among conductive layers via a through-hole. The through-hole includes a plating resist portion provided on either of an interlaminar part between the conductive layer and the insulation layer or another interlaminar part between the insulation layers, or both. The plating portion(s) is/are provided on the interlaminar parts which had been exposed in an opening as the through-hole, and on an exposed region other than the plating resist portion, and the plating resist portion is made of a cured product of the resin composition.
Process for electroless copper deposition on laser-direct structured substrates
The invention disclosed relates to an aqueous activator solution and a method for the electroless deposition of copper on a laser direct structured substrate surface. By the invention, an aqueous activator solution comprising a strong reducing agent is proposed to enhance the catalytic activity of the irradiated surface area of a LDS substrate.