Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 μm for fine line width/pitch.

A wiring board (10) includes a substrate (11) that is transparent and a wiring pattern region (20) that is disposed on the substrate (11) and that includes a plurality of wiring lines (21, 22). The wiring pattern region (20) has a sheet resistance of less than or equal to 5 Ω/sq, and each wiring line (21, 22) has a maximum width of less than or equal to 3 μm when viewed at a viewing angle of 120°.

In a light-emitting device (30), a wiring pattern including conductor wirings (160, 165) and electrodes (170, 180) is formed on a substrate (110), and an Au layer (120) is formed on the wiring pattern.

A printed circuit board includes a substrate, and a wiring provided on the substrate. The wiring includes a copper-based metal wire provided on the substrate and a surface-treated layer provided on the copper-based metal wire. The copper-based metal wire includes mainly a copper. The surface-treated layer includes an amorphous layer including oxygen and a metal with a higher oxygen affinity than the copper.

The present disclosure provides a method for producing a wiring substrate. A seeded substrate including an insulation substrate, a conductive undercoat layer, and a conductive seed layer provided in a first region, in that order, is first prepared. An insulation layer covering the seed layer and the undercoat layer is then formed. Subsequently, the insulation layer is etched to expose a surface of the seed layer and form a remaining insulation layer covering the undercoat layer in the second region. Subsequently, a voltage is applied between an anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing aqueous solution disposed between the seed layer and the anode and the membrane and the seed layer pressed into contact with each other, thereby a metal layer being formed on the surface of the seed layer. Thereafter, the remaining insulation layer is removed and the undercoat layer is etched.

A circuit board includes a base layer, a seed layer formed on the base layer, and a first electrode layer formed on the seed layer. The seed layer is formed of a metal oxide with a thickness of 100 to 400 Å. he circuit board may further include an insulation layer formed on the first electrode layer and a second electrode layer formed on the insulation layer.

Tamper-respondent assemblies are provided which include a circuit board, an enclosure assembly mounted to the circuit board, and a pressure sensor. The circuit board includes an electronic component, and the enclosure assembly is mounted to the circuit board to enclose the electronic component within a secure volume. The enclosure assembly includes a thermally conductive enclosure with a sealed inner compartment, and a porous heat transfer element within the sealed inner compartment. The porous heat transfer element is sized and located to facilitate conducting heat from the electronic component across the sealed inner compartment of the thermally conductive enclosure. The pressure sensor senses pressure within the sealed inner compartment of the thermally conductive enclosure to facilitate identifying a pressure change indicative of a tamper event.

Forming aluminum circuit layers forming an aluminum circuit layers on one surface of a ceramic substrate and forming copper circuit layers are included. The copper circuit layers are formed by laminating copper boards for the circuit layers on the respective aluminum circuit layers, arranging the laminate between a pair of support boards having a convex curved surface at least on one surface so as to face to each other, moving the support boards in a facing direction to press the laminate in a lamination direction, and heating in this pressing state so that the copper boards for the circuit layers are bonded on the aluminum circuit layers respectively by solid phase diffusion. In the step of forming the copper circuit layers, the support boards are arranged so that either one of the convex curved surface is in contact with the adjacent copper boards for the circuit layers in the laminate.

A method of fabricating an electronic power module by additive manufacturing, the electronic module including a substrate having an electrically insulating plate presenting opposite first and second faces, with a first metal layer arranged directly on the first face of the insulating plate, and a second metal layer arranged directly on the second face of the insulating plate. At least one of the metal layers is made by a step of depositing a thin layer of copper and a step of annealing the metal layer, and the method further includes a step of forming at least one thermomechanical transition layer on at least one of the first and second metal layers, the at least one thermomechanical transition layer including a material presenting a coefficient of thermal expansion that is less than that of the metal of the metal layer.

A circuit board includes a base layer, a seed layer formed on the base layer, and a first electrode layer formed on the seed layer. The seed layer is formed of a metal oxide with a thickness of 100 to 400 Å. The circuit board may further include an insulation layer formed on the first electrode layer and a second electrode layer formed on the insulation layer.