Patent classifications
H05K2201/0341
Method for manufacturing a multi-layer circuit board capable of being applied with electrical testing
A manufacturing method for a multi-layer circuit board is provided. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer, the delivery loading plate and the patterned metal interface layer expose the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board to check if the multi-layer circuit board can be operated normally or not.
CORE SUBSTRATE, MULTI-LAYER WIRING SUBSTRATE, SEMICONDUCTOR PACKAGE, SEMICONDUCTOR MODULE, COPPER-CLAD SUBSTRATE, AND METHOD FOR MANUFACTURING CORE SUBSTRATE
A technique for making a glass core substrate that is less prone to cracking. A core substrate of the present invention includes a glass plate and a first conductor pattern provided on a first main surface of the glass plate. The first conductor pattern includes a first nickel plating layer that is provided on the first main surface of the glass plate and has a phosphorus content of 5 mass % or less and a first copper plating layer that is provided on the first nickel plating layer.
Flexible printed circuit board
A flexible printed circuit board with reduced ion migration from signal-carrying elements which are coated against corrosion includes an insulating layer, a wiring area, a copper electroplating layer, a nickel electroplating layer, a cover film, and a gold chemical-plating layer. The wiring area is formed on the insulating layer. The copper electroplating layer formed on the wiring area has a first portion and a second portion. The nickel electroplating layer is formed on at least the first portion and exposes sidewalls of the first portion. The cover film is formed on the second portion and fills in gaps of the copper electroplating layer. The gold chemical-plating layer is formed on top surface of the nickel electroplating layer and the sidewalls of the first portion.
METHOD FOR MANUFACTURING A MULTI-LAYER CIRCUIT BOARD CAPABLE OF BEING APPLIED WITH ELECTRICAL TESTING
A manufacturing method for a multi-layer circuit board is provided. According to the multi-layer circuit board manufactured by the manufacturing method, the multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer, the delivery loading plate and the patterned metal interface layer expose the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board to check if the multi-layer circuit board can be operated normally or not.
Radio frequency transmission line with finish plating on conductive layer
This disclosure relates to a transmission line for high performance radio frequency (RF) applications. One such transmission line can include a bonding layer configured to receive an RF signal, a barrier layer, a diffusion barrier layer, and a conductive layer proximate to the diffusion barrier layer. The diffusion barrier layer can have a thickness that allows a received RF signal to penetrate the diffusion barrier layer to the conductive layer. In certain implementations, the diffusion barrier layer can be nickel. In some of these implementations, the transmission line can include a gold bonding layer, a palladium barrier layer, and a nickel diffusion barrier layer.
Multi-layer circuit board capable of being applied with electrical testing and method for manufacturing the same
A multi-layer circuit board capable of being applied with electrical testing includes a patterned metal-interface layer, a metallic delivery loading plate, an electrical connection layer, a conductive corrosion-barrier layer, a bottom dielectric layer, and a multi-layer circuit structure. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer. The top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. The delivery loading plate and the patterned metal-interface layer expose the conductive corrosion-barrier layer. Therefore, before the multi-layer circuit board is packaged, an electrical testing can be applied to the multi-layer circuit board to check if it can be operated normally. Hence, costs for figuring out reasons of the unqualified electronic component can be reduced, and responsibilities for the unqualified electrical testing result of the electronic component can be clarified.
Printed wiring board and method for manufacturing the same
A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and having openings exposing the conductor pads, respectively, and plating bumps formed on the conductor pads such that each of the plating bumps includes a base plating layer formed in a respective one of the openings of the solder resist layer, and a top plating layer formed on the base plating layer. The plating bumps are formed such that the base plating layer has an upper surface and a side surface including a portion protruding from the solder resist layer and having a rough surface and that the top plating layer has a hemispherical shape and is covering only the upper surface of the base plating layer.
METHOD FOR MANUFACTURING INSULATED CIRCUIT BOARD, INSULATED CIRCUIT BOARD, AND THERMOELECTRIC CONVERSION MODULE
The method for manufacturing an insulated circuit board of the present invention includes: a ceramic/aluminum-joining step of joining an aluminum material to a ceramic substrate and thereby, forming an aluminum layer; a titanium material-disposing step of disposing a titanium material on a surface of the aluminum layer or the aluminum material in a circuit pattern shape; a titanium layer-forming step of performing a heat treatment in a state where the titanium material is laminated on the surface of the aluminum layer or the aluminum material and thereby, forming the titanium layer; and an etching treatment step of etching the aluminum layer on which the titanium layer is formed, into the circuit pattern shape.
THREE-DIMENSIONAL WIRING BOARD PRODUCTION METHOD, THREE-DIMENSIONAL WIRING BOARD, AND SUBSTRATE FOR THREE-DIMENSIONAL WIRING BOARD
A three-dimensional wiring board production method is provided that includes: a preparation step of preparing a resin film (1) having a breaking elongation of 50% or more; a first metal film formation step of forming a first metal film (3) on a surface of the resin film; a pattern formation step of performing patterning on the first metal film to form a desired pattern; a three-dimensional molding step of performing three-dimensional molding by heating and pressurizing the resin film; and a second metal film formation step of forming a second metal film (21) on the first metal film having a pattern formed thereon. In the first metal film formation step, metal is deposited in a particle state to form the first metal film in a porous state.
METHOD FOR MANUFACTURING CIRCUIT BOARD
A method for manufacturing the circuit board comprises following steps of providing an insulating substrate, and defining at least one through-hole on the insulating substrate to extending through two opposite surfaces of the insulating substrate; forming a silver layer on each of the two opposite surfaces, and forming a silver conductive structure in each through-hole connecting the silver layers; forming a copper wiring layer on the silver layers to cover each silver conductive structure and a portion region of the silver layers; and etching the silver layers to form a silver wiring layer corresponding to the copper wiring layer, wherein a first etching liquid, which does not etch the copper wiring layer, is used for etching the silver layers.