An electronic device with an active region comprising a substrate; a first conducting layer, disposed on the substrate, comprising a first pad in the active region; a second conducting layer, disposed on the first conducting layer, comprising a second pad in the active region; a first electronic component, disposed on the first pad, and electronically connected to the first pad; and a second electronic component, disposed on the second pad, and electronically connected to the second pad.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and having openings exposing the conductor pads, respectively, and plating bumps formed on the conductor pads such that each of the plating bumps includes a base plating layer formed in a respective one of the openings of the solder resist layer, and a top plating layer formed on the base plating layer. The plating bumps are formed such that the base plating layer has an upper surface and a side surface including a portion protruding from the solder resist layer and having a rough surface and that the top plating layer has a hemispherical shape and is covering only the upper surface of the base plating layer.

A printed circuit board includes a first insulating layer; a first wiring layer having at least a portion buried in one surface side of the first insulating layer and having at least a portion of one surface exposed from the one surface of the first insulating layer; a metal post disposed on the exposed one surface of at least the portion of the first wiring layer; and a second wiring layer disposed on the other surface of the first insulating layer. A width of a first surface, connected to the exposed one surface of at least a portion of the first wiring layer, of the metal post, is greater than a width of a second surface of the metal post opposing the first surface.

A conductive bump electrode structure includes a substrate, an elastic circuit layer, at least two conductive bumps, and an insulating layer. The elastic circuit layer is mounted on the substrate, and includes at least one elastic circuit. The at least two conductive bumps are mounted on the elastic circuit layer, and are electrically connected to each other through the at least one elastic circuit. The insulating layer is mounted on the elastic circuit layer, and includes at least two holes. Since there is a gap between the conductive bumps, the conductive bump electrode structure is easy to be bent and fit body curves of various parts of a user. The elastic circuit can stretch or compress along with the user's movement due to its elasticity, thereby increasing suitability of the conductive bump electrode structure to the human body.

The disclosure provides an electronic device including a substrate, at least one conductive composite structure, and an electronic element. The at least one conductive composite structure is disposed on the substrate. The at least one conductive composite structure includes a first metal layer, a second metal layer, and a third metal layer. The second metal layer is located between the first metal layer and the third metal layer, and the thickness of the second metal layer ranges from 0.5 μm to 12 μm. The electronic element is disposed on the at least one conductive composite structure and bonded to the at least one conductive composite structure.

Provided is a copper foil provided with a carrier in which the laser hole-opening properties of the ultrathin copper layer are good and which is suitable for producing a high-density integrated circuit substrate. A copper foil provided with a carrier having, in order, a carrier, an intermediate layer, and an ultrathin copper layer, wherein the specular gloss at 60° in an MD direction of the intermediate layer side surface of the ultrathin copper layer is 140 or less.

A module having high reliability in terms of its connection to an external unit is provided. The module includes: a wiring substrate that mounts components and 3b thereon; a substrate electrode formed on one main surface of the wiring substrate; a columnar conductor connected at one end to the substrate electrode; an intermediate coating formed to cover an outer peripheral surface of the columnar conductor; and a first sealing resin layer provided to cover one main surface of the wiring substrate and the intermediate coating. The intermediate coating has a coefficient of linear expansion which is between that of the columnar conductor and that of the first sealing resin layer.

A packaging substrate is provided, which includes: an insulating layer; a plurality of conductive bumps formed on the insulating layer, wherein each of the conductive bumps has a post body exposed from the insulating layer and a conductive pad embedded in the insulating layer, the post body being integrally formed with and less in width than the conductive pad; and a plurality of conductive posts disposed on the conductive pads and embedded in the insulating layer. As such, a semiconductor chip can be bonded to the packaging substrate through the conductive bumps. The present disclosure further provides a method for fabricating the packaging substrate.

A method of manufacturing a wiring board includes a stacking process in which N (N is an integer equal to or greater than 2) wiring layers, end portions of which include linear conductor patterns, are stacked, with the end portions superimposed, via substrates (insulating layers) provided among the wiring layers and a laminated plate is manufactured and a removing process in which the insulating layers around the end portions of the conductor patterns of the laminated plate are removed to machine the end portions into N flying leads projecting from an end face.

A multi-layer circuit board includes a first circuit board, multiple conducting blocks, a second circuit board, and multiple conducting recesses. The first circuit board has a first conductor layer formed thereon. The conducting blocks are mounted on the first circuit board and electrically connected to the first conductor layer. The second circuit board has a second conductor layer mounted thereon and facing the first circuit board. The conducting recesses are formed in the surface of the second circuit board. Each conducting recess has a conducting layer electrically connected to the second conductor layer. When the conducting blocks are mounted in the conducting recesses, the first conductor layer and the second conductor layer are electrically connected through the conducting blocks and the conducting recesses. As can be separated from the first circuit board for test of the two conductor layers, the yield of the second circuit board is enhanced.