A circuit board having a circuit pattern on a base plate and an additional metal layer laid and bonded on the circuit pattern, wherein the additional metal layer comprises an attachment plane portion configured to fix a semiconductor chip using solder, and an engagement uneven portion provided adjacent to the attachment plane portion, wherein the attachment plane portion is a face having unevenness smaller than the engagement uneven portion.

A display apparatus includes a display panel including a display substrate on which a plurality of pad terminals is disposed, and a driving unit including a plurality of driving terminals electrically connected to the plurality of pad terminals. Each of the plurality of pad terminals includes a stepped groove that faces a corresponding driving terminal of the plurality of driving terminals or each of the plurality of pad terminals includes an opening hole that faces the corresponding driving terminal of the plurality of driving terminals.

The present disclosure relates to a laminated-type chip component, and more particularly, to a laminated-type chip component which can be more stably bonded by forming a groove filled with solder in a region in which an external electrode terminal of the laminated-type chip is soldered and thereby increasing the area of soldering.

A filter is disposed on a base board. The filter includes a first portion, a second portion, a ground portion, a first coupling portion and a second coupling portion. The first portion is disposed on a first layer in the base board to input signals. The second portion is disposed on the first layer to output signals. The ground portion is disposed on a second layer in the base board. The first coupling portion is disposed on the first layer. The first coupling portion is electrically coupled to the first portion and the second portion. The first coupling portion is electrically coupled to the ground portion through via holes. The second coupling portion is disposed on the first layer. The second coupling portion is electrically coupled to the first portion and the second portion. The second coupling portion is electrically coupled to the ground portion through the via holes.

A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.

Methods for manufacturing electrical circuits on laminates from low profile copper layers where one or more of the circuits have known and reproducible signal losses. The method for manufacturing printed circuit boards (40) comprising the steps of: providing a planar sheet (16) including a planar dielectric material layer having a first planar surface and a second planar surface, and first copper foil sheet (10) having a first planar surface and a second planar surface wherein the first copper foil planar surface is associated with the first dielectric material layer planar surface and wherein the first copper foil sheet first surface and second surface each include a bond enhancement layer (12, 14); and forming a circuit pattern (32, 34, 36) in the first planar copper sheet by removing unnecessary portions of the first planar copper sheet while leaving the circuit pattern copper in place to form an inner layer sheet including a circuit pattern wherein a bond enhancement layer is not applied to the circuit pattern after forming the circuit pattern.

A semiconductor package and methods for producing the same are described. One example of the semiconductor package is described to include a substrate having a first face and an opposing second face. The package is further described to include a plurality of solderable surfaces formed on the first face of the substrate, a first solderable surface in the plurality of solderable surfaces having a pattern plating structure on an outward facing surface of the first solderable surface. There may also be an amount of solder bonded to the outward facing surface of the first solderable surface, where the pattern plating structure on the outward facing surface of the first solderable surface causes the amount of solder to have a first thickness at its ends, a second thickness at its center, and a discrete transition between the first thickness and the second thickness.

A conductive component including: a substrate, a first layer comprising a plurality of island structures disposed on the substrate, wherein the island structures include graphene; and a second layer disposed on the first layer, wherein the second layer includes a plurality of conductive nanowires. Also, an electronic device including the conductive component.

An image pickup apparatus is configured with an image pickup device on which a plurality of bumps are arranged in line on an outer circumferential portion of a light receiving surface; and a flexible wiring board including a plurality of inner leads each of which is configured with a distal end portion, a bending portion and a rear end portion, the distal end portion being compression-bonded to a bump, and the rear end portion being arranged parallel to a side face of the image pickup device with the bending portion interposed between the distal end portion and the rear end portion. A height of a light receiving portion side of the bumps is lower than a height of a side face side; and each of the inner leads is plastically transformed according to a shape of a top face of the bumps.

A method of soldering can include: providing a first electronic component having a first buttoned soldering pad including a first soldering pad and one or more first button heads protruding from a first surface of the soldering pad; providing a second electronic component having a soldering pad; and soldering the first buttoned soldering pad to the soldering pad. The method includes introducing solder to spaces around the one or more first buttons of the first buttoned soldering pad. The method includes introducing a first solder to spaces around the one or more first buttons of the first buttoned soldering pad; introducing a second solder to spaces around one or more second buttons of a second buttoned soldering pad of the first electronic component; and forming spaces between the first and second solder that electronically insulate the first solder from the second solder.