An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.

A power circuit includes multiple bus bars that are connected to multiple terminals of an FET, are provided flush with each other, and are each insulated from each other. The power circuit includes one bus bar that is connected to drain terminals of the FET, a solder fixing portion of the FET that is arranged on the bus bar, and another bus bar that is connected to source terminals of the FET via a conductive connection sheet.

A wiring circuit board includes a first insulating layer, a terminal, a second insulating layer disposed at one side in a thickness direction of the terminal, and a wire continuous to the terminal in a direction crossing the thickness direction. The first insulating layer has an opening portion passing through the first insulating layer in the thickness direction and having the opening cross-sectional area increasing as being closer to one side in the thickness direction. The terminal has a peripheral end portion and a solid portion. The peripheral end portion contacts with an inner side surface of the first insulating layer. The inner side surface forms the opening portion. The solid portion integrally disposed with the peripheral end portion at the inner side of the peripheral end portion. The peripheral end portion and the solid portion fill the entire opening portion.

High-current circuit having a printed circuit board comprising a non-conductive substrate 2, a conductor layer 4 applied to the substrate 2 and an insulation layer 6 applied to the conductor layer, contact pads 8, 10, 12, 20, 22, 24 in each case interrupting the insulation layer 6 being arranged on both sides of the conductor plate, and the contact pads 8, 10, 12, 20, 22, 24 making contact with one another via vias 14 through the substrate 2, and the vias 14 being arranged in the area of the contact pads 8, 10, 12, 20, 22, 24, 10, 12, 20, 22, 24, characterized in that at least a first one of the contact pads 8 is arranged on a first side of the printed circuit board and a first semiconductor switch 28 is connected directly to at least a second one of the contact pads 20 on a second side of the printed circuit board, and in that the semiconductor switch 28 is connected to the first contact pad 8 directly via the vias 14 and the second contact pad 20, without further conductor tracks.

A conductive glass substrate, and a system and a method for manufacturing the same are provided. The conductive glass substrate includes a glass substrate structure, a conductive base structure and a conductive extending structure. The glass substrate structure includes at least one through hole connected between a bottom surface and a top surface thereof. The conductive base structure is disposed on the bottom surface of the glass substrate structure. The conductive extending structure is electrically connected to the conductive base structure, and the conductive extending structure is extended from the conductive base structure to the top surface of the glass substrate structure along an inner surface of the at least one through hole. Hence, the conductive glass substrate can provide at least one conductive via so as to electrically connect an upper circuit and a lower circuit.

An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of the antenna. An uppermost wiring layer of the plurality of wiring layers is connected to the antenna through a connection via of an uppermost via layer of the plurality of via layers. The connection via penetrates at least a portion of the encapsulant.

A modules is provided in which an electronic component is disposed on a first main surface and each of a plurality of first connection terminals is disposed on a second main surface. Moreover, a second connection terminal is disposed on the second main surface. When a substrate is viewed in a direction perpendicular to the second main surface, the second connection terminal is larger in area than each of the first connection terminals. When the substrate is viewed in the direction perpendicular to the second main surface, the second connection terminal is disposed on a straight line connecting the first connection terminals. The second connection terminal serves to establish an electrical connection.

Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.

A manufacturing method of a metal structure is disclosed, which includes the following steps: forming a seed layer on a substrate; forming a patterned metal layer on the seed layer, wherein the patterned metal layer includes a metal member; forming a first patterned photoresist layer on the seed layer, wherein a thickness of the first patterned photoresist layer is less than a thickness of the patterned metal layer; and performing a first patterning process to the seed layer through the first patterned photoresist layer to form a patterned seed layer, wherein after the first patterning process, the metal member includes a first part and a second part, the first part is disposed between the patterned seed layer and the second part, and a width of the first part is greater than a width of the second part.

A printed circuit board includes an insulating layer, a circuit pattern embedded in the insulating layer and including a first metal layer, a second metal layer and a third metal layer disposed between the first metal layer and the second metal layer, and a connection conductor disposed on one surface of the insulating layer and connected to the circuit pattern, wherein the first metal layer is exposed through the one surface of the insulating layer.