H05K2201/0379

Transparent conductor and device

According to one embodiment, a transparent conductor includes a transparent substrate; a metal nanowire layer disposed on the transparent substrate and including a plurality of metal nanowires; a graphene oxide layer covering the metal nanowire layer; and an electrical insulating resin layer disposed in contact with the graphene oxide layer.

Stretchable mounting board

A stretchable mounting board that includes a mounting electrode section electrically connected to stretchable wiring, and solder electrically connected to the mounting electrode section. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer, and the concentration of the bismuth in the second electrode layer is constant along a thickness direction thereof.

Conductive particles and test socket having the same
11373779 · 2022-06-28 · ·

Proposed is a conductive particle used for a testing socket electrically connecting a lead of a device to be tested and a pad of a test board by being arranged between the device to be tested and the test board, wherein the conductive particle has a predetermined depth d and has a length l that is greater than a width w, the conductive particle having a body part in a pillar shape, a first convex part having an upper surface, formed in a top of the body part, and a second convex part having a lower surface, formed in a bottom of the body part.

METHOD OF MANUFACTURING BONDED BODY FOR INSULATION CIRCUIT SUBSTRATE BOARD AND BONDED BODY FOR INSULATION CIRCUIT SUBSTRATE BOARD

Forming aluminum circuit layers forming an aluminum circuit layers on one surface of a ceramic substrate and forming copper circuit layers are included. The copper circuit layers are formed by laminating copper boards for the circuit layers on the respective aluminum circuit layers, arranging the laminate between a pair of support boards having a convex curved surface at least on one surface so as to face to each other, moving the support boards in a facing direction to press the laminate in a lamination direction, and heating in this pressing state so that the copper boards for the circuit layers are bonded on the aluminum circuit layers respectively by solid phase diffusion. In the step of forming the copper circuit layers, the support boards are arranged so that either one of the convex curved surface is in contact with the adjacent copper boards for the circuit layers in the laminate.

LUMINAIRE AND HOUSING FOR SUCH A LUMINAIRE WITH INTEGRATED LINE FOR TRANSMITTING SIGNALS

A housing for a luminaire or an operating device for the luminaire, wherein the housing is configured to accommodate at least one electronic component and/or a light source, and comprising a conductive housing component (2). The housing includes at least one line (1, 1′, 1″, 1′″, 1″″) for transmitting electric high frequency signals or for transmitting and/or receiving radio waves. The transmission line is formed by arranging a dielectric layer (4, 4a, 4b, 9) and a conductor (3, 3 . . . 3c, 7) on the housing component (2) such that the conductive housing component (2) serves as a reference plane, and the conductive housing component (2) and the conductor (3, 3 . . . 3c, 7) sandwich the dielectric layer (4, 4a, 4b, 9).

Electroless metal-defined thin pad first level interconnects for lithographically defined vias

A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.

Wiring substrate and module
11324108 · 2022-05-03 · ·

A module (101) includes a substrate (1) having a main surface (1a) and a conductor column (4) disposed on the main surface (1a). The conductor column (4) includes a conductor column body (4a) and an overhanging part (4b) overhanging from an outer periphery of the conductor column body (4a) in a middle of a height direction of the conductor column body (4a).

ELECTROCONDUCTIVE SUBSTRATE HAVING METAL WIRING, METHOD FOR PRODUCING THE ELECTROCONDUCTIVE SUBSTRATE, AND METAL INK FOR FORMING METAL WIRING

An electroconductive substrate including a base material and a metal wiring made of at least either of silver and copper, and the electroconductive substrate has an antireflection region formed on part or all of the metal wiring surface. This antireflection region is composed of roughened particles made of at least either of silver and copper and blackened particles finer than the roughened particles and embedded between the roughened particles. The blackened particles are made of silver or a silver compound, copper or a copper compound, or carbon or an organic substance having a carbon content of 25 wt % or more. The antireflection region has a surface with a center line average roughness of 15 nm or more and 70 nm or less. The electroconductive substrate is formed from metal wiring from a metal ink that forms roughened particles, followed by application of a blackening ink containing blackened particles.

Interconnection of printed circuit boards with nanowires
20230319976 · 2023-10-05 ·

A carrier assembly may include a first carrier sub-assembly, said first carrier sub-assembly having an elongated shape and comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure extending up to a first area provided on one of two extremities of the elongated shape, wherein a first plurality of conductive nanowires is provided on said first area, and a second carrier sub-assembly, said second carrier sub-assembly comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure comprising a second area, wherein a second plurality of conductive nanowires is provided on that second area.

Carrier assembly and method for producing a carrier assembly
20230354529 · 2023-11-02 ·

Described herein is a component carrier, wherein the component carrier comprises a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure, wherein a first of said electrically conductive layer structures comprises a first surface where a first plurality of conductive nanowires is connected and a second of said electrically conductive layer structures comprises a second surface where a second plurality of conductive nanowires is connected, wherein said first and second surfaces and said first and second pluralities of nanowires are configured to at least partially connect the nanowires of the first plurality of nanowires with the respective nanowires of the second plurality of nanowires.