The present disclosure provides a routing structure. The routing structure includes a substrate having a first circuit region and a boundary surrounding the first circuit region. The routing structure also includes a first conductive trace coupled to a first conductive pad disposed in the first circuit region. The first conductive trace is inclined with respect to the boundary of the substrate. A method of forming a routing structure is also disclosed.

Disclosed is a motor or generator comprises a rotor and a stator, wherein the rotor has an axis of rotation and is configured to generate first magnetic flux parallel to the axis of rotation, the stator is configured to generate second magnetic flux parallel to the axis of rotation, and at least one of the rotor or the stator is configured to generate a magnetic flux profile that is non-uniformly distributed about the axis of rotation. Also disclosed is a method that involves arranging one or more magnetic flux producing windings of a stator non-uniformly about an axis of rotation of a rotor of an axial flux motor or generator.

A method of fabricating an electromagnet includes obtaining a first flexible PCB that includes one or more first conductive coiled traces and obtaining a second flexible PCB that includes one or more second conductive coiled traces. The first flexible PCB is bent into a shape having at least one curve or corner. With the first flexible PCB having been bent into the shape, the second flexible PCB is then bent into the shape: the second flexible PCB is positioned adjacent to the first flexible PCB to conform with the first flexible PCB.

Spacer self-aligned via structures for gate contact or trench contact are described. In an example, an integrated circuit structure includes a plurality of gate structures above a substrate. A plurality of conductive trench contact structures is alternating with the plurality of gate structures. The integrated circuit structure also includes a plurality of dielectric spacers, a corresponding one of the plurality of dielectric spacers between adjacent ones of the plurality of gate structures and the plurality of conductive trench contact structures, wherein the plurality of dielectric spacers protrudes above the plurality of gate structures and above the plurality of conductive trench contact structures. A conductive structure is in direct contact with one of the plurality of gate structures or with one of the plurality of conductive trench contact structures.

An embodiment of a dual-path amplifier includes a power splitter connected to first and second power amplifiers respectively connected to first and second transmission lines connected to a power combiner having a phase-offset deficit at the second harmonic frequency 2f0, where the first and second transmission lines are designed to provide a complementary phase offset at 2f0 substantially equal to the phase-offset deficit such that the two amplified signals will be combined at the power converter with a total phase offset at 2f0 of about 180 degrees in order to reduce harmonic distortion in the amplified output signal, without substantially diminishing the output power at the fundamental frequency f0. In certain PCB-based implementations, the transmission lines include metal traces and lumped elements providing different impedance transformations that achieve the complementary phase offset, where the metal traces may have significantly different physical and electrical characteristics.

A method may include receiving a first and a second complementary signal to provide differential signaling. The method may further include providing a first conductor trace to transport the first complementary signal; providing a second conductor trace to transport the second complementary signal, the second conductor trace immediately adjacent to the first conductor trace; providing a third conductor trace to transport the first complementary signal, the third conductor trace immediately adjacent to the second conductor trace; and providing a fourth conductor trace to transport the second complementary signal, the fourth conductor trace immediately adjacent to the third conductor trace.

Capacitor assembly, comprising a printed circuit board comprising a first conductive trace and a second conductive trace, and a first row of capacitors comprising a plurality of surface mounted capacitor elements. Each of the plurality of surface mounted capacitor elements comprises a pair of outer electrodes, one of the pair being mounted to the first conductive trace and defining a first junction, and the other one being mounted to the second conductive trace defining a second junction. The first junction and the second junction define a first capacitor longitudinal axis. The first conductive trace has a first current flow direction with a first oblique angle relative to the first capacitor longitudinal axis.

A signal transmission circuit packaging structure is disclosed. The signal transmission circuit packaging structure includes a body, a main circuit unit, power pins, input pins, output pins, control pins and ground pins. The main circuit unit is arranged in the center of the body. The power pins are arranged in the center of the body. The input pins are arranged at a first side of the body and are electrically connected to the main circuit unit. The output pins are arranged at a side of the body opposite to the first side and are electrically connected to the main circuit unit. The control pins are arranged at a second side of the body and are electrically connected to the main circuit unit. The ground pins are arranged at corners of the body to separate the input pins, the output pins and the control pins.

A capacitor packaging having a central termination and three or more capacitors (or groups of capacitors) arranged about the central termination. The electrical flow paths between the termination and the capacitors or groups of capacitors are of substantially the same length. The capacitors or groups of capacitors may be arranged in a generally circular pattern with the termination centered on the center. The termination may include first and second terminals. The capacitors may be mounted to a printed circuit board (“PCB”) with traces on opposite surfaces of the PCB providing electrical flow paths from the terminals to opposite legs of the capacitors. The capacitor packaging may include a primary PCB with a first circular arrangement of capacitors and a secondary PCB with a second circular arrangement of capacitors. The capacitors may be sandwiched between the PCBs with the second arrangement of capacitors disposed concentrically inwardly of the first arrangement.

A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.