Patent classifications
H05K2201/09227
Acousto-optic modulator system and device with connections and related methods
An acousto-optic system may include a laser source, and an AOM coupled to the laser source and having an acousto-optic medium and transducer electrodes carried by the medium. The acousto-optic system may also include an interface board with a dielectric layer and signal contacts carried by the dielectric layer, and connections coupling respective signal contacts with respective transducer electrodes. Each connection may include a dielectric protrusion extending from the AOM, and an electrically conductive layer on the dielectric protrusion for coupling a respective transducer electrode to a respective signal contact.
CONTACT ARRANGMENT AND ELECTRONIC ASSEMBLY
A contact arrangement includes a plurality of contact groups. At least one of the contact groups includes a plurality of shared contacts, a plurality of dedicated contacts, and a plurality of ground contacts. The shared contacts in a first mode or a second mode transmit signals corresponding to the first mode or the second mode. The dedicated contacts transmit the signals corresponding to the first mode and do not transmit the signals corresponding to the second mode. The ground contacts surround the shared contacts and the dedicated contacts.
MULTI-LEVEL PRINTED CIRCUIT BOARDS AND MEMORY MODULES INCLUDING THE SAME
A printed circuit board includes a first electrically conductive reference plane configured to distribute a first reference voltage applied thereto across a surface area of the first reference plane, and a second electrically conductive reference plane extending parallel to the first reference plane, and configured to distribute a second reference voltage applied thereto across a surface area of the second reference plane. A first layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more first signal lines extending adjacent the first reference plane. The first layer is divided into: (i) a first region in which the one or more first signal lines are disposed, (ii) a second region containing an additional plane that is configured to receive a third voltage and has smaller surface area relative to the surface areas of the first and second reference planes, and (iii) a third region containing a dielectric layer. A second layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more second signal lines extending adjacent the second reference plane. The second signal lines have linewidths that vary as a function of whether they are vertically aligned with the first region, the second region, or the third region.
ZIGZAG WIRED MEMORY MODULE
A memory module includes a printed circuit board (PCB) including a multi-layer having a wiring structure formed therein. A length of the PCB in a first direction is longer than a length of the PCB in a second direction perpendicular to the first direction. A plurality of memory chips includes a plurality of solder balls. The plurality of memory chips is arranged in a first row and a second row respectively extending in the first direction on the PCB. The plurality of solder balls is continuously arranged in the first direction. The wiring structure alternately zigzag-connects the plurality of memory chips arranged in the first row and the second row.
Memory controller for selective rank or subrank access
A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.
Flexible circuit board
A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.
CIRCUIT BOARD AND PROBE CARD
A circuit board includes an insulating substrate having a first surface and a second surface opposite to the first surface, a solid conductor located inside the insulating substrate, a first via conductor connected to the solid conductor from a side of the first surface, and a second via conductor connected to the solid conductor from a side of the second surface. The solid conductor has a cutout that intersects a line segment that connects a node of the first via conductor and a node of the second via conductor to each other.
Stretchable conductive substrate
A stretchable conductive substrate includes a substrate and a circuit layer. The substrate has a plurality of predetermined areas. The circuit layer is formed on the substrate and defines a conductive contact group and at least one elastic wire structure connected to the conductive contact group in each of the predetermined areas. The at least one elastic wire structure has at least one patterned wire segment and a stretch rate thereof along a length direction of the substrate is from 0% to 60%.
CIRCUIT BOARD AND PREPARATION METHOD THEREOF
A circuit board and a manufacturing method therefor. The circuit board includes a substrate and a plurality of traces arranged at intervals on the substrate. Each trace includes a seed layer located on one surface of the substrate, a first copper layer located on the surface of the seed layer away from the substrate, and a second copper layer plated on one surface of the substrate. The second copper layer covers the seed layer and the first copper layer. The ratio of the thickness of each trace to the space between any two adjacent traces is greater than 1. The thickness of the second copper layer in the thickness direction of the substrate is greater than the thickness of the second copper layer in a direction perpendicular to the thickness direction of the substrate.
CIRCUIT BOARD
A circuit board includes a first section on a left side of a third section in a signal-conductor-layer left-right direction and extending in parallel or substantially in parallel with the third section in a signal-conductor-layer front-back direction when viewed in a stacking direction. The first section includes first thin line portions and first thick line portions, each of the first thick line portions has a line width greater than a line width of each of the first thin line portions. The first thin line portions and the first thick line portions are alternately arranged in the signal-conductor-layer front-back direction. In the signal-conductor-layer left-right direction, center lines of the first thin line portions are positioned leftward relative to center lines of the first thick line portions.