A high frequency signal cross-layer transmission structure in a multi-layer printed circuit board includes a bottom metal layer, a middle metal layer and a top metal layer. The bottom metal layer includes a bottom ground plane and a bottom conductive area. The middle metal layer includes a middle ground plane. The top metal layer includes a top ground plane and a top conductive area. The bottom ground plane defines and surrounds a bottom annular clearance area. The middle ground plane defines and surrounds a middle clearance area. The top ground plane defines and surrounds a top annular clearance area. The bottom annular clearance area surrounds at least one part of the bottom conductive area. The top annular clearance area surrounds at least one part of the top conductive area. A size-shape of the top annular clearance area is different from a size-shape of the middle clearance area.

A circuit assembly includes a first substrate including a first outer surface, a first capacitor disposed on the first outer surface, and a first metallic bar. The first capacitor has a first capacitor thickness in a first direction orthogonal to the first outer surface. The first metallic bar has a first bar thickness in the first direction, the first bar thickness being greater than the first capacitor thickness. An electrical load is optionally disposed on a second outer surface of the first substrate over the first metallic bar, in the first direction. The electrical load may be electrically coupled to the first metallic bar.

Apparatus and methods are provided for providing provide high-speed traces in inner layers of semiconductor packages or PCBs. In an exemplary embodiment, there is provided an circuit assembly that may comprise a first ground reference plane, a second ground reference plane and a dielectric layer between the first ground reference plane and the second ground reference plane. The dielectric layer may comprise a pair of traces embedded therein and the first ground reference plane may have an opening corresponding to the pair of traces. The opening may have a width equal to or larger than a width of the pair of traces, which may be equal to widths of respective traces of the pair of traces and a gap between the pair of traces.

An electronic device according to various embodiments comprises: a circuit element; a printed circuit board comprising a first connection pad connected to the ground of the electronic device, a second connection pad, and a third connection pad arranged between the first connection pad and the second connection pad and connected to a signal terminal of the circuit element; and a flexible printed circuit board (FPCB) comprising a coupling part connected to the printed circuit board, and a connection part extending from the coupling part, wherein the FPCB comprises first ground wiring connected to the first connection pad and extending from the coupling part to the connection part in an assigned direction, second ground wiring connected to the second connection pad and extending from the coupling part to the connection part in the assigned direction, signal wiring connected to the third connection pad and extending from the coupling part to the connection part in the assigned direction, while being arranged between the first ground wiring and the second ground wiring, and third ground wiring arranged in an opposite direction to the assigned direction so as to be connected, in the coupling part, to the first ground wiring and the second ground wiring and surround the signal wiring. Other various embodiments are possible.

A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.

A shielding member is provided. The shielding member includes a shielding layer having flexibility, and an insulating layer stacked on the shielding layer. The shielding layer includes a nanofiber layer including nanofibers plated to have electrical conductivity and coated with an adhesive material, and conductive particles disposed in the nanofiber layer.

Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.

Provided is a circuit module including a power supply chip module, a load chip module, and a system board. A power supply output terminal group of the power supply chip module is arranged side by side in a row along a side of the power supply chip module board, the power supply input terminal group of a load chip module includes a specific terminal group arranged in a specific row that is a row along a side of the load chip module board, and a wiring width along an arrangement direction of the power supply output terminal group of a wiring pattern in which the power supply output terminal group is connected to the system board is equal to or more than a wiring width W31 along an arrangement direction of the specific terminal group of the wiring pattern in which the specific terminal group is connected to the system board.

Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.

Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.