Patent classifications
H05K2201/09354
Protection of electronics in negative pressure wound therapy systems
Embodiments of negative pressure wound therapy systems and methods are disclosed. In one embodiment, an apparatus includes a housing, negative pressure source, circuit board, and one or more controllers. The circuit board can be supported by the housing and include a conductive pathway extending around at least part of a perimeter of a first side of the circuit board. The conductive pathway can be electrically coupled to an electrical ground for the circuit board. The one or more controllers can be mounted on the circuit board and activate and deactivate the negative pressure source.
CIRCUIT BOARD AND ELECTRONIC-COMPONENT-EQUIPPED CIRCUIT BOARD
A multilayer body includes insulator layers including a first insulator layer laminated in a vertical direction. Electrodes include a signal electrode and are provided at an upper main surface of the first insulator layer and arranged in a transverse direction. At least a portion of each of the electrodes is exposed to outside from a circuit board. First and second interlayer connection conductors extend through the first insulator layer in the vertical direction and electrically connect the signal electrode and a signal conductor layer. Mounting portions are located at the portions of the electrodes that are exposed to the outside from the circuit board. The first and second interlayer connection conductors are electrically connected to the signal electrode so as not to overlap the mounting portion that is provided at the signal electrode.
Electronic device including conductive structure connecting electrically ground layer of flexible printed circuit board and ground layer of printed circuit board
According to various embodiments, an electronic device may include a housing including a first plate, a second plate facing away from the first plate, and a side housing surrounding a space between the first plate and the second plate and joined to the second plate or provided integrally with the second plate, a display viewable through at least part of the first plate, a first Printed Circuit Board (PCB) disposed between the first plate and the second plate and including at least one first ground layer, a Flexible Printed Circuit Board (FPCB) at least partially overlapping the first PCB when viewed from above the first plate and including a first end electrically coupled to the first PCB, a second end, and at least one second ground layer, and a conductive structure comprising a conductive material disposed between the first PCB and the FPCB and electrically coupling the first ground layer and the second ground layer.
Package comprising a substrate having a via wall configured as a shield
A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.
COVER PLATES THAT ATTENUATE ELECTROSTATIC DISCHARGE AT PRINTHEADS
Systems and methods are provided for cover plates for printheads. One embodiment is an apparatus that includes a cover plate for a printhead. The cover plate includes multiple layers of electrically conductive material, a layer of nonconductive ferrite that is sandwiched between the multiple layers, and at least one connector that penetrates through the multiple layers and the layer of nonconductive ferrite to form a conductive pathway for electric current between the multiple layers through the layer of nonconductive ferrite. The cover plate also includes at least one opening that penetrates through the multiple layers and the layer of nonconductive ferrite, and that is configured to align with nozzles of the printhead.
Printed circuit board shielding and power distribution via edge plating
A circuit board and method of manufacture therefor utilize voltage domain edge plating disposed on at least a portion of one or more edges of a circuit board to electrically couple voltage domain conductive shapes disposed in different conductive layers of the circuit board. By doing so, interconnection of multiple voltage domain conductive shapes in different conductive layers may be facilitated with improved power integrity, while also providing EMI shielding along the edge of the circuit board.
Cover plates that attenuate electrostatic discharge at printheads
Systems and methods are provided for cover plates for printheads. One embodiment is an apparatus that includes a cover plate for a printhead. The cover plate includes multiple layers of electrically conductive material, a layer of nonconductive ferrite that is sandwiched between the multiple layers, and at least one connector that penetrates through the multiple layers and the layer of nonconductive ferrite to form a conductive pathway for electric current between the multiple layers through the layer of nonconductive ferrite. The cover plate also includes at least one opening that penetrates through the multiple layers and the layer of nonconductive ferrite, and that is configured to align with nozzles of the printhead.
PACKAGE COMPRISING A SUBSTRATE HAVING A VIA WALL CONFIGURED AS A SHIELD
A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.
ELECTRONIC DEVICE AND ELECTRIC POWER STEERING APPARATUS HAVING ELECTRONIC DEVICE MOUNTED THERETO
The electronic device includes: a substrate having an electronic circuit formed therein; a housing for housing the substrate; and a connector disposed on the substrate and serving as an interface between outside and inside of the housing. The substrate has a main circuit pattern portion that forms a main circuit and a frame ground pattern portion that forms a frame ground. The main circuit pattern portion and the frame ground pattern portion are disposed so as not to overlap each other on the substrate and in the substrate. A terminal of the connector is disposed in the frame ground pattern portion.
Snap-on electromagnetic interference (EMI)-shielding without motherboard ground requirement
A device includes a printed circuit board (PCB) and a shield for the PCB. The shield can reduce high frequency electromagnetic frequency (EMF) noise generated by one or more components of the PCB. The PCB includes pads to interface with a corresponding connector. For example, for a dual inline memory module (DIMM) PCB, the PCB includes pads to insert into a DIMM connector. The shield includes a gap in its perimeter that aligns with clips in the corresponding connector. The gaps will correspond to similar features of the PCB that interface with the corresponding connector to allow the shield to attach to the PCB. The shield includes lock fingers to extend from a connector-facing edge of the shield to interface with the corresponding connector to align the shield with the corresponding connector.