H05K2201/0939

Printed circuit board for galvanic effect reduction

Devices and methods are described for reducing etching due to Galvanic Effect within a printed circuit board (PCB) that may be used in an electronic device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trace. The contact finger is configured to couple the electronic device to a host device. The contact trace is electrically isolated from the rest of the PCB circuitry during a fabrication process by a separation distance between an exposed portion of the contact trace and an impedance trace. The contact finger and the exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to the impedance trace using a solder joint.

Overlap Joint Flex Circuit Board Interconnection
20240049392 · 2024-02-08 ·

An interconnection for flex circuit boards used, for instance, in a quantum computing system are provided. In one example, the interconnection can include a first flex circuit board having a first side and a second side opposite the first side. The interconnection can include a second flex circuit board having a third side and a fourth side opposite the third side. The first flex circuit board and the second flex circuit board are physically coupled together in an overlap joint in which a portion of the second side for the first flex circuit board overlaps a portion of the third side of the flex circuit board. The interconnection can include a signal pad structure positioned in the overlap joint that electrically couples a first via in the first flex circuit board and a second via in the second flex circuit board.

ELECTRONIC DEVICE HAVING PAD STRUCTURE
20240049387 · 2024-02-08 · ·

An electronic device includes a housing; a printed circuit board provided in the housing and including a fastening hole; a pad structure provided on the printed circuit board, the pad structure including: a first pad surrounding at least a portion of the fastening hole; a second pad spaced apart from the first pad in a first direction; and a third pad spaced apart from the first pad in a second direction that is different from the first direction with respect to the fastening hole; a first electronic component provided on the printed circuit board and electrically connected to the second pad; and a metal plate including: a first plate area provided on the first pad; and a second plate area extending from the first plate area and provided on one of the second pad and the third pad.

PRINTED CIRCUIT BOARD

A printed circuit board includes a first insulating layer, a plurality of first and second pads disposed on the first insulating layer, and a solder resist layer disposed on the first insulating layer, the solder resist layer having a plurality of first and second openings respectively exposing at least portions of the plurality of first and second pads. The first pad has a closed region having a side surface covered by the solder resist layer, and an open region having a side surface exposed by the first opening. The second pad has only a closed region having a side surface covered by the solder resist layer.

WIRING SUBSTRATE

A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

ADDRESSABLE SWITCH ASSEMBLY FOR WELLBORE SYSTEMS AND METHOD
20190309608 · 2019-10-10 · ·

A method for controlling a target switch assembly in a chain of switch assemblies includes distributing the chain of switch assemblies in a wellbore; placing a controller at a head of the wellbore; making a first decision, at the controller, to actuate a corresponding detonator of the target switch assembly; transmitting, from the controller to the target switch assembly, a fire command to activate the corresponding detonator; and making a second decision, locally, at the target switch assembly, to activate the detonator, after the fire command from the controller is received.

METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE, AND ELECTRONIC DEVICE

A manufacturing method of a circuit board including an annular land portion around a through hole through which a terminal that is an object of a soldering penetrates, and that is soldered on the land portion by a soldering process with a solder supply, the manufacturing method includes: previously forming a preliminary solder at a position opposite to a supply position of the solder in the land portion with respect to the through hole before the soldering process.

Solderless inter-component joints
10390440 · 2019-08-20 · ·

In a die-substrate assembly, a copper inter-component joint is formed by bonding corresponding copper interconnect structures together directly, without using solder. The copper interconnect structures have distal layers of (111) crystalline copper that enable them to bond together at a relatively low temperature (e.g., below 300 C.) compared to the relatively high melting point (about 1085 C.) for the bulk copper of the rest of the interconnect structures. By avoiding the use of solder, the resulting inter-component joint will not suffer from the adverse IMC/EM effects of conventional, solder-based joints. The distal surfaces of the interconnect structures may be curved (e.g., one concave and the other convex) to facilitate mating the two structures and improve the reliability of the physical contact between the two interconnect structures. The bonding may be achieved using directed microwave radiation and microwave-sensitive flux, instead of uniform heating.

FILLING CRACKS ON A SUBSTRATE VIA
20240155767 · 2024-05-09 ·

A semiconductor device assembly is provided. The assembly includes a substrate having a first layer with a first contact and a second layer with a second contact. A via that includes a first conductive material electrically couples the first contact and the second contact. A second conductive material having a lower melting point than the first conductive material is disposed at least partially between the via and the second contact. When a crack occurs between the via and the second contact, the second conductive material may be heated to fill the crack. Thus, the techniques, apparatuses, and systems disclosed herein may provide a repairable substrate.

SOLDERLESS INTER-COMPONENT JOINTS
20190239361 · 2019-08-01 ·

In a die-substrate assembly, a copper inter-component joint is formed by bonding corresponding copper interconnect structures together directly, without using solder. The copper interconnect structures have distal layers of (111) crystalline copper that enable them to bond together at a relatively low temperature (e.g., below 300 C.) compared to the relatively high melting point (about 1085 C.) for the bulk copper of the rest of the interconnect structures. By avoiding the use of solder, the resulting inter-component joint will not suffer from the adverse IMC/EM effects of conventional, solder-based joints. The distal surfaces of the interconnect structures may be curved (e.g., one concave and the other convex) to facilitate mating the two structures and improve the reliability of the physical contact between the two interconnect structures. The bonding may be achieved using directed microwave radiation and microwave-sensitive flux, instead of uniform heating.