A multilayered substrate in accordance with an aspect of the present disclosure may include an insulating layer, a conductive pattern embedded, at least partially, in the insulating layer, and a bump being electrically connected to the conductive pattern and penetrating the insulating layer. The bump may include a low melting point metal layer having a melting point lower than a melting point of the conductive pattern and a high melting point metal layer having a melting point higher than the melting point of the low melting point metal layer and having a latitudinal cross-sectional area smaller than a latitudinal cross-sectional area of the low melting point metal layer.

Flexible fingers for flexible printed circuits improve the crack resistance of prior art designs. The crack resistance can be improved by encapsulating the trace inside additional layers such that the outer two layers include only the lands of the through-hole, and all other copper is etched away. The crack resistance can also be improved with strategically adding copper on layers other than the trace layer including attaching is to the land of the through-hole as a stub. These two designs can be combined to include a stub trace into a four-layered design.

A method for manufacturing a flexible printed circuit board, comprising: providing a flexible printed circuit substrate; defining first through holes and second through holes through the flexible printed circuit substrate; and forming first conductive pillars and second conductive pillars; and defining first grooves by removing a portion of each first conductive pillar and defining second grooves by removing a portion of each second conductive pillar; the first grooves and the second grooves are defined from an outer surface of the flexible printed circuit board on the second conductive pattern layer side to a surface of the second conductive pattern layer away from the first conductive pattern layer; each of the first grooves is aligned with and corresponds to one first conductive pillar, and each of the second grooves is aligned with and corresponds to one second conductive pillar.

A flexible printed circuit board (PCB), a method for manufacturing the flexible PCB, and a PCB structure having the flexible PCB are disclosed. A flexible printed circuit board includes a first conductive pattern layer, a second conductive pattern layer, a plurality of first conductive pillars, and a plurality of second conductive pillars. Each of the plurality of first conductive pillars electrically connects to the first conductive pattern layer and is spaced from the second conductive pattern layer, and a plurality of second conductive pillars electrically connects to the second conductive pattern layer and is spaced from the first conductive pattern layer. The plurality of first conductive pillars and the plurality of second conductive pillars are exposed from one surface of the flexible printed circuit board to form a plurality of electrical contact pads.

A Printed Circuit Board (PCB) includes a via extending through at least one layer of the PCB. The PCB may also include a first catch pad connected to the via and located within a first metal layer of the PCB. The first catch pad may have a first size. The PCB may further include a second catch pad connected to the via and located within a second metal layer of the PCB. The second catch pad may have a second size greater than the first size. The second catch pad may overlap horizontally with a portion of a metallic feature in the first metal layer to obstruct light incident on a first side of the PCB from transmission to a second side of the PCB through a region of dielectric material near the via.

The invention provides a circuit board structure and a manufacturing method thereof. The circuit board structure includes a line portion, a first insulating layer, and a conductive terminal. The first insulating layer is disposed on the line portion. The conductive terminal is disposed on the first insulating layer and embedded in the first insulating layer to be electrically connected with the line portion. The conductive terminal includes a first portion, a second portion, and a third portion. The first portion protrudes from a surface of the first insulating layer. The second portion is embedded in the first insulating layer and connected to the first portion. The third portion is disposed between the line portion and the second portion. A width of the second portion is greater than a width of the third portion.

In accordance with embodiments of the present disclosure, a circuit board may include a first trace formed in a first layer of the circuit board, a second trace formed in a second layer of the circuit board, a via, and a termination pad. The via may be configured to electrically couple the first trace to the second trace, the via comprising a via stub corresponding to a first portion of a length of the via not within a second portion of the via between a first location in which the first trace is electrically coupled to the via and a second location in which the second trace is electrically coupled to the via. The termination pad may be formed at an end of the via stub opposite at least one of the first location and the second location.

The present disclosure generally relates to semiconductor structures and, more particularly, to via and skip via structures and methods of manufacture. The method includes: forming a first metallization layer with a first capping layer over the first metallization layer; forming a second metallization layer with a second capping layer over the second metallization layer; forming a partial skip via structure to the first metallization layer by removing a portion of the first capping layer and the second capping and depositing conductive material in an opening formed in the second metallization layer; forming a third capping layer over the filled partial skip via and the second capping layer; and forming a remaining portion of a skip via structure in alignment with the partial skip via structure by opening the third capping layer to expose the conductive material of the partial skip via.

A Printed Circuit Board (PCB) includes a via extending through at least one layer of the PCB. The PCB may also include a first catch pad connected to the via and located within a first metal layer of the PCB. The first catch pad may have a first size. The PCB may further include a second catch pad connected to the via and located within a second metal layer of the PCB. The second catch pad may have a second size greater than the first size. The second catch pad may overlap horizontally with a portion of a metallic feature in the first metal layer to obstruct light incident on a first side of the PCB from transmission to a second side of the PCB through a region of dielectric material near the via.

The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.