A method for manufacturing a light-emitting module includes a step of providing a bonded board including a board including, on a first surface, a circuit pattern and wiring pads that are continuous with the circuit pattern and each have bottomed holes and light-emitting segments connected on a second surface of the board with an adhesive sheet interposed therebetween and including an array of light-emitting devices; a step of supplying electrically conductive paste inside the bottomed holes and on portions of the surface of the wiring pad around the bottomed holes through openings of a mask; and a step of performing thermal compression to harden the electrically conductive paste such that the thickness of the electrically conductive paste on the portions of the surface of the wiring pad is smaller than the electrically conductive paste at the timing of being disposed through the openings of the mask.

A ceramic substrate capable of suppressing the reduced reliability caused by via misalignment during manufacturing, and capable of suppressing the reduced reliability caused by thermal stress between the ceramic substrate and a mounting board is provided. The ceramic substrate includes an electrode and a via connected to the electrode. The ceramic substrate includes a plurality of vias provided to a center portion in a first direction of the electrode along a second direction. The first direction is parallel to a surface on which the electrode is disposed. The first direction is a direction connecting a center of the surface to a center of the electrode. The second direction is parallel to the surface and perpendicular to the first direction.

Provided is a substrate including a first wiring layer, wherein the first wiring layer has a structure in which among a plurality of first connection parts of a plurality of vias, at least one of first connection parts of two vias located closer to both ends of the first wiring layer is coupled to a body of the first wiring layer through a first conductive portion, each of the plurality of first connection parts being coupled to the first wiring layer, and a cross-sectional area of the first conductive portion is less than an area of a first part of the first wiring layer, the first part being in contact with a first connection part of a via other than the first connection parts of the two vias.

In a printed circuit board (1), thermal vias (19) are formed between the lower surface (A) and an upper surface (B) of the substrate plate (10) of the printed circuit board through the steps of: applying a respective solder resist mask (21, 31) to the lower surface (A) and the upper surface (B); applying solder to the lower surface (A) and reflow soldering the solder, wherein the solder penetrates into the boreholes (20) and forms convex menisci (26) protruding beyond the edge (22) of the respective boreholes on the lower surface (A); and creating regions (35) on the upper surface (B), which are freed from solder resist material, and which are intended for contacting at least one electronic component (17) on the upper surface and each of which comprise at least one of the thermal vias. Subsequently, the upper surface (B) can be provided with electrical components (17) on these regions (35). The first solder resist mask (21) has a respective region (23) that is free of solder resist on the lower surface around the edge of every borehole (20).

A printed circuit board including: a circuit layer including a plurality of circuit layers; a first structure including a plurality of first unit vias, each first unit via being vertically disposed and formed between successive circuit layers that are vertically adjacent to each other; and a second structure including a plurality of second unit vias, each second unit via being vertically disposed and horizontally spaced apart from a respective first unit via, wherein a horizontal spaced distance between each respective first unit via and the second unit via is a set value or less.

To reduce the effect of undesirable electrical resonances in via stubs (e.g., portions of electrically conductive material in a via that form an open circuit by electrically connecting at only one end), a multi-layer printed circuit board can electrically connect traces in different layers using two vias that are electrically connected to each other. For example, a first electrical trace can electrically connect to a first via at a first layer, the first via can electrically connect to a second via at the topmost layer (or the bottommost layer), and the second via can electrically connect to a second electrical trace at a second layer. Compared to a typical single-via connection scheme, the two-via connection scheme can produce stubs that are shorter in length and therefore have an increased resonant frequency that may avoid interference with electrical signals sent through the first and second electrical traces.

In one embodiment, an apparatus includes a printed circuit board, a via-stub resonator formed in the printed circuit board, a plurality of vias surrounding the via-stub resonator, and a microstrip connected to the via-stub resonator for use in measuring an insertion loss to provide a resonance frequency. The via-stub resonator is designed to reproduce a dielectric constant value of a known material in a simulation. A via dielectric constant in an x and y plane is calculated based on the resonance frequency. A method for measuring the via dielectric constant using the via-stub resonator is also disclosed herein.

An electroplating method of a circuit board includes: providing a multi-layer board having a conductive layer embedded therein; penetratingly forming a thru-hole and at least one penetrating hole in the multi-layer board, and forming a conductive portion on an inner wall defining the thru-hole and connected to the conductive layer, wherein the at least one penetrating hole is located at one side of the thru-hole, and an annular portion of the conductive layer exposed from the at least one penetrating hole is defined as an electroplated region; and electroplating the electroplated region to be formed with a metal post by applying a current to the conductive portion, wherein the metal post is filled in the at least one penetrating hole and is connected to the electroplated region.

Systems and methods for providing a PWB. The methods comprise: forming a Core Substrate (CS) a First Via (FV) formed therethrough; disposing a First Trace (FT) on an exposed surface of CS that is in electrical contact with FV; laminating a first HDI substrate to CS such that FT electrically connects FV via with a Second Via (SV) formed through the first HDI substrate; disposing a Second Trace (ST) on an exposed surface of the first HDI substrate that is in electrical contact with SV; and laminating a second HDI substrate to the first HDI substrate such that ST electrically connects SV to a Third Via (TV) formed through the second HDI substrate. SV comprises a buried via with a central axis spatially offset from central axis of FV and SV. FV and SV have diameters which are smaller than TV's diameter.

The present disclosure relates to a PCB laminated structure, including a first substrate; a second substrate disposed to overlap with the first substrate on the top and bottom; and an interposer assembly provided between the first substrate and the second substrate to allow electromagnetic connection between the first and second substrates, wherein the interposer assembly includes a housing configured to form a closed region along a top surface circumference of the first substrate and a bottom surface circumference of the second substrate to support the first and second substrates; a signal via connected to the first and second substrates, respectively, to transmit electromagnetic signals between the first substrate and the second substrate; and a ground via connected to the housing to serve as a ground, and spaced a set distance from the signal via at one side of the signal via.