An interposer-type component carrier includes a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; a cavity formed in an upper portion of the stack; an active component embedded in the cavity and having at least one terminal facing upwards; and a redistribution structure having only one electrically insulating layer structure above the component. A method of manufacturing an interposer-type component carrier is also disclosed.

A printed circuit board includes an insulating layer; a recess portion disposed on one surface of the insulating layer; and a circuit layer disposed on the one surface of the insulating layer and including a signal pattern and a ground pattern. At least a portion of the ground pattern covers at least a portion of the recess portion.

Embodiments herein relate to systems, apparatuses, or processes to using vias, or plated through holes (PTH), within a substrate or within a sub laminate to create capacitors. The interior of a via may have a first layer, or coating, of an electrically conductive material such as copper, formed on the sides of the via. A second layer including a dielectric material is placed on the first layer of the electrically conductive material. A third layer of electrically conductive material may then be placed on the second layer of the dielectric material. Other embodiments may be described and/or claimed.

A multi-layer printed circuit board having a first landing pad in a first layer and along a first axis arranged to receive a positive signal and a second landing pad in the first layer and along a second axis that is spaced away from the first axis longitudinally in the first layer and where the second landing pad arranged to receive a negative signal. A first buried in a second layer and along the first axis is spaced away from the first landing pad along the first axis. A second buried in the second layer and along the second axis is spaced away from the second landing pad along the second axis. A first signal connector provides a first electrical connection between the first landing pad and the second buried via and a second signal connector provides a second electrical connection between the second landing pad and the first buried via.

A circuit board may include a traditional via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board and a slotted via formed within the circuit board proximate to the traditional via, the slotted via comprising an opening through a first surface and a second surface of the circuit board and a layer of conductive material formed on interior walls of the opening.

A printed circuit board (PCB) is provided for transmitting a differential signal. The PCB includes first and second conductive signal layers. The first conductive signal layer includes a first positive trace of the differential signal and a first negative trace of the differential signal. The second conductive signal layer includes a second positive trace of the differential signal and a second negative trace of the differential signal. The first positive trace is adjacent to the first negative trace, and the second positive trace is adjacent to the second negative trace and directly below the first negative trace.

Embodiments may relate to a microelectronic package or a die thereof which includes a die, logic, or subsystem coupled with a face of the substrate. An inductor may be positioned in the substrate. Electromagnetic interference (EMI) shield elements may be positioned within the substrate and surrounding the inductor. Other embodiments may be described or claimed.

An apparatus comprising a stack of printed circuit board (PCB) layers having a primary longitudinal structure forming a radio frequency (RE) via including a principal tuning section (223) and a constant longitudinal structure (227) along a conductive column support (255) journaled through the layers in the via. The principal section (221) comprising a first tuning sub-assembly (229 A) in a first portion of the RE via above the longitudinal structure (227) and at an entrance of the primary longitudinal structure (221) and comprising a first set of pad, anti-pad pairs (445, 545, 645) tuned to receive an RE band. A second principal tuning sub-assembly (229B) in a second portion of the via below the longitudinal structure (227) and at an exit of the primary longitudinal structure and comprising a second set of pad, anti-pad pairs (445, 545, 645) tuned to receive the band and mirroring the first set of pairs.

An electronic device is provided. The electronic device includes a housing including a first housing part and a second housing part movable with respect to the first housing part, and a circuit board positioned in the housing and including a first part bent in response to movement of the second housing part and a second part extending from the first part and more rigid than the first part, wherein the circuit board may comprise a flexible non-conductive film extending from the first part to the second part, a laminate structure including at least one conductive pattern positioned on the flexible non-conductive film, a coverlay extending from the first part to the second part, overlapping the laminate structure, and including an electromagnetic shielding material, and at least one conductive via positioned at the second part and electrically connecting the at least one conductive pattern and the coverlay.

Methods for producing a printed circuit board and printed circuit boards are disclosed, including a method in which a slot is formed in a substrate, the substrate having at least three layers with the slot extending through at least two of the layers. The slot has a length and a width with the length being greater than the width. The sidewall of the substrate surrounding the slot is coated with a conductive layer. The conductive layer is separated into at least two segments that are electrically isolated along the side wall of the substrate.