An electronic device is provided and includes a wiring structure including a conductive wiring and an insulating layer. The conductive wiring is disposed on a substrate and has a top side and two side walls opposite to each other. The insulating layer wraps around the conductive wiring at least through the top side and two side walls, wherein there is a gap between the insulating layer and at least one of the two side walls. The conductive wiring includes a first layer, a second layer and a third layer, the second layer is disposed between the first layer and the third layer, and the first layer is disposed between the second layer and the substrate. A thickness of the second layer is greater than a thickness of the first layer, and the thickness of the second layer is greater than a thickness of the third layer.

A multilayer resin substrate includes insulating resin base material layers, and conductor patterns on at least one of the insulating resin base material layers. The conductor patterns include a ground conductor on a main surface of the insulating resin base material layers and extend into a frame shape or a planar shape, and the ground conductor includes openings. An aperture ratio of the openings in an outer peripheral portion of the ground conductor is less than an aperture ratio of the openings in an inner peripheral portion of the ground conductor.

A flexible display panel and a display device are provided. The flexible display panel includes a bending region and a display region. The bending region includes a plurality of metal wirings; each metal wiring is in long strip shape and includes a metal strip; a plurality of openings are defined through the metal strip. In the width direction of the metal strip, a ratio of a minimum distance from a point of an edge of the one of the openings to a neighboring side of the metal strip to a minimum width of the metal strip ranges from 0.1 to 0.7. A wiring structure of the bending region can prevent a stress concentration of the bending region, enhance a strength during a bending process, and avoid a breakage of the metal wiring.

An electronic device includes a printed circuit board (PCB). The PCB includes first and second grids disposed at a top surface and a bottom surface of the PCB, respectively. Each grid includes a plurality of footprint pins, and a plurality of vias extending through the PCB to the top and bottom surfaces. Each footprint pin includes a connecting end and a free end that opposes the connecting end. Each via includes a contact end located at one of grids and is in electrical contact with the connecting end of one of the footprint pins, and each via further includes a non-contact end that is located at the other of the grids and is not in electrical contact with any of the footprint pins. First and second connectors are mounted to the PCB top and bottom surfaces and connect with the footprint pins of the first and second grids.

A wiring structure is provided, including a conductive wiring and an insulating layer. The conductive wiring is disposed on a substrate and has a top side, a bottom side and two side walls opposite to each other. The insulating layer which wraps around the conductive wiring at least through the top side and two side walls, wherein there is a gap between the insulating layer and at least one of the two side walls.

Voids are introduced in a copper shape to reduce warpage experienced by a printed circuit board during a reflow process. Copper shapes on an outer layer of a printed circuit board may be used to connect large packages that include ball grid arrays to the printed circuit board. The copper shapes may induce warpage in the printed circuit board during the reflow process. Routing a mesh pattern of voids in the copper shapes may reduce solder ball joint cracking and pad cratering during reflow and make solder joints more reliable. The voids may make the copper shapes less ridged and change the copper heat dissipation profile to remove sharp warpage forces that cause solder joints to experience pad cratering. The voids may be 8 mil×8 mil cuts or indentations in the copper shape.

The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and the conductor layer is thinned, in such a way that the conductor material of the conductor layer is removed from outside the conductor pattern.

A metal trace is provided to include a plurality of metal traces disposed side by side on a bending region, and each of the metal traces includes a trace body, and the trace body is provided with a plurality of through holes, and the plurality of through holes are used to reduce bending stress received by the metal traces, and the plurality of through holes are spaced apart along an extending direction of the trace body. The plurality of through holes are disposed on the trace body to reduce bending stress on the metal traces.

A semiconductor device, including a first board, a second board having a plurality of through holes passing therethrough, and a plurality of external terminals that are respectively press-fitted into the plurality of through holes of the second board, one end portion of each external terminal passing through the corresponding through hole and being fixed to a front surface of the first board. The second board is a printed circuit board that further includes, in a top view thereof, a plurality of support regions, each having one of the plurality of through holes formed therein, and a plurality of buffer regions respectively surrounding the plurality of support regions, each buffer region having at least one buffer hole and at least one torsion portion formed therein, the at least one torsion portion being connected to the support region surrounded by each buffer region.

An electronic board includes: a board including an upper surface ground on an upper surface; at least one first land formed on the upper surface and connected to a first signal line; at least one second land formed on the upper surface and connected to a second signal line; at least one third land disposed on the upper surface between the first land and the second land and connected to the upper surface ground; and at least one fourth land disposed on the upper surface on a side opposite to the third land and connected to the upper surface ground, the first land being interposed between the third land and the fourth land.