A differential circuit board includes a dielectric layer having a first and a second surface, a first conductor line with a first line-width, a second conductor line with a second line-width less than the first line-width, and a ground conductor. The dielectric layer has a first portion with a first thickness between the first and second surface and a second portion with a second thickness less than the first thickness between the first and second surfaces. The first conductor line is disposed on the first surface of the first portion. The second conductor line is disposed on the first surface of the second portion. The ground conductor is disposed on the second surface of the first portion and the second surface of the second portion, wherein the ground conductor overlaps with the first conductor line and the second conductor line. The first and second conductor lines are differential transmission lines.

An optical module includes a circuit board and a silicon optical chip. The circuit board includes a plurality of circuit board bonding pads. The silicon optical chip includes a plurality of chip bonding pads corresponding to the plurality of circuit board bonding pads. The plurality of chip bonding pads are electrically connected to the corresponding circuit board bonding pads, so that the silicon optical chip is electrically connected to the circuit board. A chip bonding pad is electrically connected to at least one corresponding circuit board bonding pad through a plurality of bonding wires, or a circuit board bonding pad is electrically connected to at least one corresponding chip bonding pad through a plurality of bonding wires. A connecting line of two or more of bonding positions of the plurality of bonding wires on the circuit board bonding pads is inclined with respect to a connecting line of centers of the circuit board bonding pads.

In an illustrative example, an apparatus includes a passive-on-glass (POG) device integrated within a glass substrate. The apparatus further includes a semiconductor die integrated within the glass substrate.

A three-dimensional inductance coil and a method for producing the same in printed circuit board are provided. The method comprises the following steps: 1) Drilling through-holes on a twin surface copper-clad laminate bilaterally, to form two rows of through-holes on the twin surface copper-clad laminate; 2) cleaning the interior of through-holes; 3) Copper-plating the walls of the through-holes to form a copper layer thereon; 4) filling the through-holes with copper fully to form the first copper column row and the second copper column row in the twin surface copper-clad laminate; 5) Attaching photosensitive dry films to twin surfaces of the copper-clad laminate, and exposing and developing the dry films to perform patterns on twin surfaces of the copper-clad laminate, then etching the twin surfaces of the copper-clad laminate, thereby the first and the second copper column rows, as well as several separate upper and lower traces are made, wherein the top of the (n+1)th column of the first copper column row is connected to the top of the nth column of the second copper column row through one upper trace, and the bottom of the nth column of the first copper column row is connected to the bottom of the nth column of the second copper column row through one lower trace. This method features high efficiency.

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

Sheets are laminated on each other and pressure bonded with fixtures from upper and lower directions of a lamination direction while being heated to produce a laminated circuit substrate including therein a capacitor and a coil. The capacitor is defined by a first conductor pattern and a second conductor pattern that face each other across thermoplastic resin layers. In the laminated circuit substrate, the first conductor pattern includes a first principal surface, the second conductor pattern includes a second principal surface, the first principal surface faces the second conductor pattern, the second principal surface faces the first conductor pattern, and the first principal surface and the second principal surface are subject to a roughening process.

A flexible printed circuit board (PCB), a method for manufacturing the flexible PCB, and a PCB structure having the flexible PCB are disclosed. A flexible printed circuit board includes a first conductive pattern layer, a second conductive pattern layer, a plurality of first conductive pillars, and a plurality of second conductive pillars. Each of the plurality of first conductive pillars electrically connects to the first conductive pattern layer and is spaced from the second conductive pattern layer, and a plurality of second conductive pillars electrically connects to the second conductive pattern layer and is spaced from the first conductive pattern layer. The plurality of first conductive pillars and the plurality of second conductive pillars are exposed from one surface of the flexible printed circuit board to form a plurality of electrical contact pads.

A method and apparatus for determining misregistration of internal layers of a PCB using resistance measurements is disclosed. In one embodiment, a method includes measuring a first resistance between a first center terminal and a first peripheral terminal of a first registration coupon on a printed circuit board (PCB) panel including at least one PCB. The method further includes measuring a second resistance between the first center terminal and a second peripheral terminal of the first registration coupon, wherein the first and second peripheral terminals are associated with a first internal layer of the PCB. A difference between the first and second resistances is then calculated. Then, based on this difference, a determination is made of a distance of misregistration of the first internal layer, if any, along a first axis.

A switched inductor DC-DC power converter chiplet includes a CMOS power switch, an LC filter, regulation circuitry, feedback control circuitry, and interface control circuitry integrated on a common substrate. The inductor for the LC filter can be formed on the same surface or on opposing surfaces of the substrate as the electrical terminations for the substrate.

The present invention consists of an implantable device with at least one package that houses electronics that sends and receives data or signals, and optionally power, from an external system through at least one coil attached to at least one package and processes the data, including recordings of neural activity, and delivers electrical pulses to neural tissue through at least one array of multiple electrodes that are attached to the at least one package. The device is adapted to electrocorticographic (ECoG) and local field potential (LFP) signals. A brain stimulator, preferably a deep brain stimulator, stimulates the brain in response to neural recordings in a closed feedback loop. The device is advantageous in providing neuromodulation therapies for neurological disorders such as chronic pain, post traumatic stress disorder (PTSD), major depression, or similar disorders. The invention and components thereof are intended to be installed in the head, or on or in the cranium or on the dura, or on or in the brain.