A circuit board has an electrical circuit and a connector that is attached to the circuit board. The connector has metal contacts. A housing of the connector has an embedded reference metal layer that is disposed under a single-ended metal contact or differential metal contacts. The reference metal layer sets the impedance of the single-ended metal contact or the differential metal contacts.

A transmission line includes first, second, third, and fourth signal lines, and first, second, third, and fourth electrode pads respectively connected thereto. A first main surface of an external connection portion includes a first region in which the first electrode pad and the second electrode pad are provided, and a second region in which the third electrode pad and the fourth electrode pad are provided. Each of the first electrode pad and the second electrode pad, in a plan view, is surrounded by a ground electrode, and at least one of the third electrode pad and the fourth electrode pad, in the plan view, includes a portion that is not surrounded by the ground electrode.

One of embodiments is a method of manufacturing driven element chips by dividing a semiconductor wafer into the driven element chips. The method includes preparing a semiconductor wafer which includes chip substrate portions arrayed in an array direction, and a clearance between the chip substrate portions adjacent to each other in the array direction. Each chip substrate portion includes: a conductive layer provided inside the chip substrate portion and including interconnect portions; and a dummy conductor provided in a part of the conductive layer where the interconnect portions are not provided.

A lighting device includes a mounting substrate comprising a first pair of conductive pads and a second pair of conductive pads arranged along a first direction on the mounting substrate. The first pair of conductive pads is offset from the second pair of conductive pads in the first direction and a second direction intersecting the first direction with respect to a plane parallel to the mounting substrate. A first light emitting device is coupled to the first pair of conductive pads, and configured to emit lights toward a first side within a space formed between the mounting substrate and a diffusion plate. A second light emitting device is coupled to the second pair of conductive pads, and configured to emit lights toward a second side opposite of the first side within the space formed between the substrate and the diffusion plate.

A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.

A display device according to an exemplary embodiment includes: a substrate including a display region configured to display an image, and a pad region positioned around the display region; and a first pad unit positioned on the pad region, wherein the first pad unit includes a first terminal region including a plurality of first pad terminals arranged in a first pattern, and a second terminal region including a plurality of second pad terminals arranged in a second pattern different from the first pattern.

An electronic device, including an array substrate, a pad portion disposed on the array substrate, and an integrated circuit disposed on the pad portion and comprising a bump portion. The pad portion includes a first sub-pad unit including a first pad having an inclined shape and a second sub-pad unit including a second pad having an inclined shape. The first pad and the second pad are symmetrically arranged with respect to an imaginary line that divides the pad portion. The pad portion is electrically connected with the bump portion.

A transmission line substrate includes a stacked body that includes insulating base materials, first and second signal lines, and first and second ground conductors. The second signal line is provided on a layer different from the layer of the first signal line and extends in parallel with the first signal line. The first ground conductor is provided on the same layer as the layer of the second signal line and overlapped with the first signal line when viewed in the Z-axis direction. The second ground conductor is provided on the same layer as the layer of the first signal line and overlapped with the second signal line when viewed in the Z-axis direction. A first transmission line includes the first signal line, the first ground conductor, and an insulating base material, and a second transmission line includes the second signal line, the second ground conductor, and the insulating base material.

A flexible circuit package. The circuit package includes a termination point on a flexible base substrate. The termination point is connected with an interface by conductive material on the base substrate. The conductive material extends across the surface area of the base substrate in multiple individual connections, which are in communication with each other and separated by voids in the conductive material for mitigating communication failure between the termination point and the interface during or following flexion, stretching, compression or other deformation of the base substrate and the circuit package. The termination point may include an input module such as a sensor, switch or other input. The termination point may include an output module such as a light, vibrator or other output. The interface may include an output interface for receiving data or an input interface for sending a command or other signal.

A circuit board has an edge connector with signal traces. The signal traces are formed on a dielectric layer of the circuit board. A reference trace is formed within the dielectric layer or on another surface of the dielectric layer. Parameters of the reference trace are adjusted to set an impedance of a single-ended signal trace or a differential impedance of two adjacent signal traces.