H05K2201/09718

Adapter plate for HF structures

What is provided is an adapter plate for HF structures, which is set up for being disposed between a back of a circuit board and a reflector, wherein the adapter plate is electrically conductive, and the adapter plate has an opening or a cavity at every location where an element is passed through the circuit board to the side of the adapter plate, wherein at least one element is passed through the circuit board exclusively for ground contacting.

PRINTED CIRCUIT BOARD CONFIGURATION TO FACILITATE A SURFACE MOUNT DOUBLE DENSITY QSFP CONNECTOR FOOTPRINT IN A BELLY-TO-BELLY ALIGNMENT
20210076495 · 2021-03-11 ·

An electronic device includes a printed circuit board (PCB). The PCB includes first and second grids disposed at a top surface and a bottom surface of the PCB, respectively. Each grid includes a plurality of footprint pins, and a plurality of vias extending through the PCB to the top and bottom surfaces. Each footprint pin includes a connecting end and a free end that opposes the connecting end. Each via includes a contact end located at one of grids and is in electrical contact with the connecting end of one of the footprint pins, and each via further includes a non-contact end that is located at the other of the grids and is not in electrical contact with any of the footprint pins. First and second connectors are mounted to the PCB top and bottom surfaces and connect with the footprint pins of the first and second grids.

PRINTED CIRCUIT BOARD, PRINTED WIRING BOARD, AND ELECTRONIC DEVICE
20210045228 · 2021-02-11 ·

A printed circuit board includes an electrical component including a signal terminal, and a printed wiring board on which the electrical component is mounted. The printed wiring board includes a signal line connected to the signal terminal. The signal line includes a first line portion, a second line portion, a third line portion, and a fourth line portion disposed continuously in this order. The signal terminal is joined with the fourth line portion such that the signal terminal and the fourth line portion form an integral structure. A second characteristic impedance of the second line portion is lower than a first characteristic impedance of the first line portion. A third characteristic impedance of the third line portion is higher than the first characteristic impedance. A fourth characteristic impedance of the integral structure formed by the fourth line portion and the signal terminal is lower than the first characteristic impedance.

System and method for via optimization in a printed circuit board

A signal trace on a printed circuit board (PCB) includes a first trace segment on a first layer of the PCB, the first trace segment having a first end coupled to a transmitter, having a second end, and having a first characteristic impedance that is matched to the transmitter. The signal trace further includes a signal via passing from the first layer of the PCB to a second layer of the PCB, the signal via having a first contact connected to the second end of the first trace segment, having a second contact on the second layer, and having a second characteristic impedance different from the first characteristic impedance. The second characteristic impedance is determined based upon a first distance between the transmitter and the first via.

Clearance size reduction for backdrilled differential vias

A printed circuit board (PCB) may include a plurality of horizontally disposed signal layers. The PCB may include a first vertically disposed differential via electrically connected to a first horizontally disposed signal layer, of the plurality of horizontally disposed signal layers, and a second horizontally disposed signal layer of the plurality of horizontally disposed signal layers. The PCB may include a second vertically disposed differential via electrically connected to the first signal horizontally disposed layer and the second horizontally disposed signal layer. The PCB may include a first set of clearances encompassing the first vertically disposed differential via and the second vertically disposed differential via, a second set of clearances encompassing the first vertically disposed stub, and a third set of clearances encompassing the second vertically disposed stub.

STRUCTURE FOR BLOCKING NOISE IN AT LEAST ONE DESIGNATED BAND AND ELECTRONIC DEVICE COMPRISING SAME
20200373647 · 2020-11-26 ·

An electronic device according to various embodiments may comprise: a housing; an antenna structure positioned in the housing; and a wireless communication circuit. The antenna structure may comprise: a first conductive layer comprising a first opening; a second conductive layer positioned in parallel with the first conductive layer, the second conductive layer comprising a second opening which at least partially overlaps with the first opening when the first conductive layer is seen from above; a third conductive layer positioned in parallel with the first conductive layer and interposed between the first conductive layer and the second conductive layer; a first insulating layer interposed between the first conductive layer and the third conductive layer; a second insulating layer interposed between the second conductive layer and the third conductive layer; a first conductive plate in the first opening, which is electrically separated from the first conductive layer; a second conductive plate in the second opening, which is electrically separated from the second conductive layer; a first conductive via electrically connected between the first conductive plate and the third conductive layer through the first insulating layer; and a second conductive via electrically connected between the second conductive plate and the third conductive layer through the second insulating layer. The wireless communication circuit may be configured to transmit or receive a signal having a frequency between 3 giga hertz (GHz) and 100 GHz and may be electrically connected to the antenna structure. Various embodiments may be possible.

Mating backplane for high speed, high density electrical connector

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

System and Method for Via Optimization in a Printed Circuit Board
20200352025 · 2020-11-05 ·

A signal trace on a printed circuit board (PCB) includes a first trace segment on a first layer of the PCB, the first trace segment having a first end coupled to a transmitter, having a second end, and having a first characteristic impedance that is matched to the transmitter. The signal trace further includes a signal via passing from the first layer of the PCB to a second layer of the PCB, the signal via having a first contact connected to the second end of the first trace segment, having a second contact on the second layer, and having a second characteristic impedance different from the first characteristic impedance. The second characteristic impedance is determined based upon a first distance between the transmitter and the first via.

Printed circuit board configuration to facilitate a surface mount double density QSFP connector footprint in a belly-to-belly alignment
10791629 · 2020-09-29 · ·

An electronic device includes a printed circuit board (PCB). The PCB includes first and second grids disposed at a top surface and a bottom surface of the PCB, respectively. Each grid includes a plurality of footprint pins, and a plurality of vias extending through the PCB to the top and bottom surfaces. Each footprint pin includes a connecting end and a free end that opposes the connecting end. Each via includes a contact end located at one of grids and is in electrical contact with the connecting end of one of the footprint pins, and each via further includes a non-contact end that is located at the other of the grids and is not in electrical contact with any of the footprint pins. First and second connectors are mounted to the PCB top and bottom surfaces and connect with the footprint pins of the first and second grids.

RF PACKAGE MODULE AND ELECTRONIC DEVICE COMPRISING RF PACKAGE MODULE
20200245450 · 2020-07-30 ·

The disclosure relates to research (No. GK17N0100, millimeter wave 5G mobile communication system development) that was conducted with the support of the Cross-Departmental Giga KOREA Project funded by the government (the Ministry of Science and ICT) in 2017.

An Radio Frequency (RF) package module according to various embodiments and an electronic device including the RF package module are provided.

The RF package module according to an embodiment includes a sub module including an Radio Frequency Integrated Chip (RFIC); an antenna configured to transmit and receive a signal wirelessly through a predetermined metal pattern; and a multi-layer circuit board including a plurality of layers in which a signal via for transferring the signal between the RFIC and the antenna and one or more ground vias are formed, wherein the antenna is spaced from the one or more ground vias by one or more anti-pads.