An electronic device including a stretchable/contractible base and a wiring formed on the base, the wiring being divided into a first region having a shape extending in a proceeding direction and a second region in which the proceeding direction is curved. The wiring includes a first conductive layer and a second conductive layer formed of a material that makes the second conductive layer easier to be curved than the first conductive layer. The first conductive layer is formed in the first region and the second conductive layer is formed in the second region.

The present disclosure relates to a method for manufacturing a printed circuit board. The method includes the steps as follows. First, a substrate including a base layer and a copper foil layer on a surface of the base layer is provided. Second, a conductive layer is formed on portions of the copper foil layer. Third, portions of the copper foil layer exposed from the conductive layer are removed by an etching process, and the conductive layer is thinner by the etching process. The reserved portions of the copper foil layer and the conductive layer form a conductive pattern to obtain a printed circuit board without plating wires. A printed circuit board without plating wires made by the above method is also provided.

A wiring body includes: a core insulating base material having a first main surface and a second main surface; a signal line and a first power supply line provided on the first main surface; a second power supply line provided on the second main surface and electrically connected to the first power supply line; a first dielectric layer laminated on the first main surface so as to embed the signal line and the first power supply line; a first ground layer provided on the first dielectric layer; a second dielectric layer laminated on the second main surface so as to embed the second power supply line; and a second ground layer provided on the second dielectric layer and sandwiching at least the signal line together with the first ground layer.

A flexible circuit board for a chip on film according to an embodiment includes: a substrate including a first surface and a second surface opposite to the first surface and including a chip mounting region; a circuit pattern layer disposed on the first surface; and a heat dissipation part disposed in the chip mounting region, wherein the substrate is formed with at least two or more holes that are formed in a region overlapping the heat dissipation part, and the heat dissipation part includes: a heat dissipation pattern layer disposed on the first surface; a connection layer disposed inside the hole; and a heat dissipation layer disposed on the second surface.

Embodiments herein may relate to a package with a dielectric layer having a first face and a second face opposite the first face. A conductive line of a patterned metal redistribution layer (RDL) may be coupled with the second face of the dielectric layer. The line may include a first portion with a first width and a second portion directly coupled to the first portion, the second portion having a second width. The first portion may extend beyond a plane of the second face of the dielectric layer, and the second portion may be positioned between the first face and the second face of the dielectric layer. Other embodiments may be described and/or claimed.

A printed wiring board includes an insulation layer, conductive pads formed on the insulation layer and positioned to connect an electronic component, and a conductive wiring pattern including first and second conductive patterns and formed on the insulation layer such that the conductive wiring pattern is extending between the conductive pads. The first pattern includes first wiring lines, the second pattern includes second wiring lines, the first and second conductive patterns are formed such that the first wiring lines and the second wiring lines are alternately arrayed on the insulation layer, each of the first wiring lines includes a first metal layer formed on an interface with the insulation layer, each of the second wiring lines includes a second metal layer formed on an interface with the insulation layer, and the first metal layer includes a metal material which is different from a metal material forming the second metal layer.

Some embodiments described herein include apparatuses and methods of forming such apparatuses. One such embodiment may include a routing arrangement having pads to be coupled to a semiconductor die, with a first trace coupled to a first pad among the pads, and a second trace coupled to a second pad among the pads. The first and second traces may have different thicknesses. Other embodiments including additional apparatuses and methods are described.

Systems and methods described herein relate to an adapter driver board for parallel operation of power modules. The systems and methods receive an electrical signal at an input interface of a high voltage adapter board. The systems and methods may deliver the electrical signals to first and second switches along corresponding first and second conductive traces. The first conductive trace extends along the high voltage adapter board and is conductively coupled to the input interface and the first switch. The second conductive trace extends along the high voltage adapter board and is conductively coupled to the input interface and the second switch. The first and second conductive traces may have an inductance or other property that is substantially the same as each other.

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component embedded in the stack, and a functional film covering at least part of the component and having an inhomogeneous thickness distribution over at least part of a surface of the component.

A chip on film for a display device, the chip on film includes: a base substrate; a lead wire disposed on the base substrate; and a driving chip connected to the lead wire, wherein the lead wire includes: a first lead part having a first thickness; and a second lead part disposed between the first lead part and the driving chip and having a second thickness greater than the first thickness, the second lead part being connected to the driving chip. The first lead part and the second lead part include a same material.