A carrier substrate (1) that includes an insulation layer (11) and a metal layer (12), wherein a flank profile (2), in particular an etching flank profile, at least zonally borders the metal layer (12) in a primary direction (P) extending parallel to the main extension plane (HSE), wherein, viewed in the primary direction (P), the flank profile (2) extends from a first edge (15) on an upper side (31) of the metal layer (12), which faces away from the insulation layer (11), to a second edge (16) on a lower side (32) of the metal layer (12), which faces the insulation layer (11), characterized in that the flank profile (2), viewed in the primary direction (P), has at least one local maximum (21) and at least one local minimum (22).

Apparatuses and methods are provided for mitigating radio frequency interference and electromagnetic compatibility issues caused by the resonance of metal planes of a circuit board. A method for controlling impedance at an edge of a circuit board includes creating a cut at an edge of a plane of the circuit board. The cut extends from the edge of the plane to a point at a depth into the plane. The method can further include creating a cut pattern in the edge of the plane by repeating the cut along the edge of the plane such that an impedance of the plane at the depth is different, or lower, than an impedance of the plane at the edge of the plane. Other aspects are described.

A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

A printed circuit board includes an insulating layer and a circuit layer disposed on the insulating layer. The circuit layer includes a first circuit pattern and a second circuit pattern. Each of the first and second circuit patterns has a first side surface, a second side surface opposing the first side surface, and a top surface connected to ends of the first and second side surfaces, when viewed in a cross section direction. The first side surface of the first circuit pattern and the first side surface of the second circuit pattern face each other. A height of the first side surface of the first circuit pattern is greater than a height of the second side surface of the first circuit pattern, and a height of the first side surface of the second circuit pattern is greater than a height of the second side surface of the second circuit pattern.

A coil device includes a first conductor in a first layer and including a spiral shape and a second conductor in the first layer connected in parallel with the first conductor and extending adjacent to and parallel or substantially parallel to the first conductor. A cross-sectional area of the first conductor and a cross-sectional area of the second conductor are different.

A printed circuit board includes an insulating layer and a circuit layer disposed on the insulating layer. The circuit layer includes a first circuit pattern and a second circuit pattern. Each of the first and second circuit patterns has a first side surface, a second side surface opposing the first side surface, and a top surface connected to ends of the first and second side surfaces, when viewed in a cross section direction. The first side surface of the first circuit pattern and the first side surface of the second circuit pattern face each other. A height of the first side surface of the first circuit pattern is greater than a height of the second side surface of the first circuit pattern, and a height of the first side surface of the second circuit pattern is greater than a height of the second side surface of the second circuit pattern.

Provided is a printed circuit board realizing selective inhibition of electromagnetic noise and enabling high-density arrangement of differential transmission lines without increasing cost. The printed circuit board includes a pair of strip conductors (first layer), a first resonance conductor plate, a ground conductive layer (together with a second layer) including an opening portion, a second resonance conductor plate (third layer), a third resonance conductor plate (fourth layer), first via holes connecting the first and second resonance conductor plates, a second via hole connecting the second and third resonance conductor plates, and third via holes connecting the third resonance conductor plate and the ground conductive layer, wherein a polygon obtained by sequentially connecting centers of the adjacent third via holes overlaps so as to include the first resonance conductor plate, and center-to-center distance between the adjacent third via holes is 0.5 wavelength or less at frequency corresponding to the bit rate.

The present invention provides a sensor comprising: a substrate; an antenna pattern formed in a spiral shape on the substrate; first and second electrodes formed on the substrate and spaced apart from each other in parallel; a circuit wiring formed to be connected to each of the first and second electrodes; and an element bonded to the antenna pattern and the circuit wiring, wherein cross sections of the first and second electrodes have a curvature.

A connecting method includes: arranging the connection terminal such that a rear surface of a base portion in a flat plate shape of the connection terminal comes into contact with a front surface of the flexible substrate; with a rising portion of the connection terminal extending from the rear surface side of the base portion toward the base portion and a tip end bending portion of the connection terminal extending from a tip end of the rising portion in a direction inclined with respect to the rising portion, displacing the rising portion toward the base portion so that the tip end bending portion protrudes from a front surface of the base portion; and holding a part of the flexible substrate between a pressing portion formed at the rising portion and a pressed portion formed at the base portion, whereby the conductive portion of the flexible substrate is electrically connected to at least one of the pressing portion and the pressed portion.

A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.