A high power radiofrequency (RF) capacitor, integrated circuit board/capacitor and methods for manufacture therefor can include a dielectric substrate, and a first metallic layer and a second metallic layer that can be deposited on opposite sides of the dielectric substrate, and a ground plane that can be co-planar with one of the metallic layers. This can establish a broadside coupling capacitance effect between the first metallic layer and the second metallic layer. The first metallic layer and the second metallic layer can have a circular profile when viewed in plan view; alternatively, the first metallic layer and second metallic layer can have a T-shaped profile when viewed in plan view. The desired profile and the desired profile geometry can depend on the design power and operating frequency for the capacitor can depend on whether the capacitor must operate as a series capacitor or a shunt capacitor.

A busbar module includes: a circuit body having a flexible circuit board; busbars; and a holder. The circuit body has: conductor layers and protective layers to form a multiple-layered structure of wiring patterns; a band-shaped main strip to be located to extend in a stacking direction of cells; and a band-shaped branch strip branched from the main strip. The branch strip has: a bent portion extending in the stacking direction and having a bent shape around an axis crossing the stacking direction; and a connection portion disposed closer to an end of the branch strip than the bent portion and connected to the corresponding busbar. The bent portion has a thin-layer portion having a shape formed by removing, from the flexible circuit board, a part of the protective layers corresponding to a part of the conductor layers without being used as the wiring pattern in the branch strip.

A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

Disclosed is a wiring board including: an insulating substrate; a plurality of connection terminals arranged on the insulating substrate; and a plurality of non-conductive protruding parts respectively arranged on areas of the insulating substrate except areas on which the plurality of connection terminals are arranged. The non-conductive protruding parts has a height greater than that of the connection terminals.

In at least one illustrative embodiment, a printed circuit board may comprise at least one insulating layer, first and second conductive layers separated from one another by the at least one insulating layer, and a conductive via extending through the at least one insulating layer and electrically coupling the first and second conductive layers. The conductive via may include an annular via sidewall having an average radial thickness of at least 2.5 mils (0.0025 inches) and a conductive pad having an average thickness of no more than 3.2 mils (0.0032 inches).

A circuit board includes: a ceramic substrate that has a first surface and a second surface; a first metal part that has a first metal plate joined to the first surface and a protrusion projecting from a front surface of the first metal plate; and a second metal part that has a second metal plate joined to the second surface. When the ceramic substrate is equally divided into first to third sections along a longer side direction, V.sub.1, V.sub.2, V.sub.3, V.sub.4, V.sub.5, and V.sub.6 are numbers satisfying formula V.sub.4/V.sub.1+V.sub.6/V.sub.32(V.sub.5/V.sub.2), 0.5V.sub.4/V.sub.12, 0.5V.sub.5/V.sub.22, and 0.5V.sub.6/V.sub.32.

A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, at least one first electrically conductive track extending from a vertical level defined by one of the layer structures up to a first height, at least one second electrically conductive track extending from the vertical level defined by the one of the layer structures up to a second height being larger than the first height, and at least one further electrically insulating layer structure in which the at least one first electrically conductive track and the at least one second electrically conductive track are embedded.

An interconnect device may include a first center conductor of a first material that has a first durometer. The first center conductor may be surrounded by a first inner dielectric ring, which may be surrounded by a conductive region of a second material having a second durometer. The second durometer may be different from the first durometer. The conductive region may have a first end that defines a first plane and a second end that defines a second plane. An outer dielectric ring may surround the conductive region. The first center conductor may have a first bulb and a second bulb, the first bulb may extend in a direction away from the second plane and beyond the first plane, and the second bulb may extend in a direction away from the first plane and beyond the second plane.

A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.