An electrical assembly includes an electrical connector mounted upon a PCB and receiving a CPU therein, and a liquid Nitrogen heat dissipation device is mounted upon the PCB and intimately seated upon the CPU to remove the heat therefrom. The liquid Nitrogen heat dissipation device includes a case forming a chamber to receive the liquid Nitrogen therein. A plurality of fixing arms extend outwardly and radially to fix the liquid Nitrogent heat dissipation device in position. A fixing seat is attached upon the PCB to precisely located the CPU in position with regard to the electrical connector.

Electronic devices may contain electrical systems in which electrical components are mounted on a substrate such as a printed circuit board. The electrical components may include surface mount technology components. Multiple surface mount technology components may be stacked on top of each other and beside each other to form an electrical component that minimizes the amount of area that is consumed on a printed circuit board. Noise suppression circuits and other circuits may be implemented using stacked surface mount technology components. Surface mount technology components placed on the printed circuit board may be pushed together and subsequently injection molded to form packed component groups. An integrated circuit may be mounted to the printed circuit board via an interposer and may cover components mounted to the printed circuit board. An integrated circuit may be mounted over a recessed portion of the printed circuit board on which components are mounted.

Disclosed are a package structure of an integrated passive device and a manufacturing method thereof and a substrate. The method includes: providing an organic frame having a chip embedding cavity and a metal pillar, laminating at least one layer of first dielectric on an upper surface of the organic frame, and processing the first dielectric by photolithography to form an opening correspondingly above the chip embedding cavity; mounting an electronic component in the chip embedding cavity through the opening, the electronic component including an upper and lower electrodes; laminating and curing a second dielectric into the chip embedding cavity and on an upper surface of the first dielectric, thinning the first and second dielectrics to expose the upper and lower electrodes, upper and lower surfaces of the metal pillar; performing metal electroplating to form a circuit layer communicated with the upper and lower electrodes and the metal pillar.

3D electrical integration is provided by connecting several component carriers to a single substrate using contacts at the edges of the component carriers making contact to a 2D contact array (e.g., a ball grid array or the like) on the substrate. The resulting integration of components on the component carriers is 3D, thereby providing much higher integration density than in 2D approaches.

According to one embodiment, a display device includes a first substrate, a second substrate opposing the first substrate, a liquid crystal layer and a light source that emits light to the liquid crystal layer, and the first substrate includes a first portion opposing the second substrate and having a first thickness and a second portion not opposing the second substrate and having a second thickness which is less than the first thickness, and the light source is disposed on the second portion, and the light source includes a first surface opposing the second portion and a second surface opposing the first surface, and a wiring substrate is disposed on the second surface so that the wiring substrate does not protrude with respect to the second substrate in a thickness direction.

Disclosed are a package structure of an integrated passive device and a manufacturing method thereof and a substrate. The method includes: providing an organic frame having a chip embedding cavity and a metal pillar, laminating at least one layer of first dielectric on an upper surface of the organic frame, and processing the first dielectric by photolithography to form an opening correspondingly above the chip embedding cavity; mounting an electronic component in the chip embedding cavity through the opening, the electronic component including an upper and lower electrodes; laminating and curing a second dielectric into the chip embedding cavity and on an upper surface of the first dielectric, thinning the first and second dielectrics to expose the upper and lower electrodes, upper and lower surfaces of the metal pillar; performing metal electroplating to form a circuit layer communicated with the upper and lower electrodes and the metal pillar.

The present disclosure describes a network switch design that includes a vertical switch circuit board that is mounted parallel to the front panel of the network switch. The vertical circuit board supports switch chip(s) to process and forward packets and pluggable module connectors to receive pluggable optics modules that provide connections to other network switches. The pluggable module connectors are horizontally oriented to facilitate routing of electrical signal traces. The arrangement of the circuit board, switch chip(s) and pluggable module connectors achieves reduced lengths for the electrical signal traces that connect the switch chip(s) to the pluggable module connectors. The design improves cooling by providing separate airflow regions between the switch chip heatsink(s) and the optics modules.

A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.

A sensor device is provided for measuring current in an electrical circuit of a PCB, including a coaxial connector mounted on a tab in the PCB having an inner conductor and a concentric outer conductor, where the tab is formed by a gap through the PCB along a portion of a perimeter surrounding the coaxial connector; a sidewall conductor formed on sidewalls of the tab and connected to ground plane; and resistors mounted on the PCB and arranged along the portion of the perimeter surrounding the coaxial connector, each resistor being connected between the inner conductor and the sidewall conductor. Current from the electrical circuit flows in a first direction through the ground plane creating a first magnetic field, and flows in a second direction between the sidewall conductor and the inner conductor through the resistors creating a second magnetic field, where the first and second magnetic field partially cancel.

According to one embodiment, a display device includes a first substrate, a second substrate opposing the first substrate, a liquid crystal layer and a light source that emits light to the liquid crystal layer, and the first substrate includes a first portion opposing the second substrate and having a first thickness and a second portion not opposing the second substrate and having a second thickness which is less than the first thickness, and the light source is disposed on the second portion, and the light source includes a first surface opposing the second portion and a second surface opposing the first surface, and a wiring substrate is disposed on the second surface so that the wiring substrate does not protrude with respect to the second substrate in a thickness direction.