The present subject matter relates to a battery module for use in a vehicle. The battery module may include a housing, a plurality of battery cells disposed within the housing, and solid state pre-charge control circuitry that pre-charges a direct current (DC) bus that may be coupled between the battery module and an electronic component of the vehicle. Furthermore, the solid state pre-charge control circuitry may include solid state electronic components as well as passive electronic components.

Electronic devices may contain electrical systems in which electrical components are mounted on a substrate such as a printed circuit board. The electrical components may include surface mount technology components. Multiple surface mount technology components may be stacked on top of each other and beside each other to form an electrical component that minimizes the amount of area that is consumed on a printed circuit board. Noise suppression circuits and other circuits may be implemented using stacked surface mount technology components. Surface mount technology components placed on the printed circuit board may be pushed together and subsequently injection molded to form packed component groups. An integrated circuit may be mounted to the printed circuit board via an interposer and may cover components mounted to the printed circuit board. An integrated circuit may be mounted over a recessed portion of the printed circuit board on which components are mounted.

A filter circuit component includes desired frequency characteristics without being influenced by a parasitic inductance and a parasitic capacitance, and since the ground terminal of the filter circuit component connected to the mounting electrode of the high-frequency component is connected to the ground electrode of the high-frequency component through the via conductors of the high-frequency component at the shortest distance, the packing density of the filter circuit component is significantly increased and the occurrence of an unnecessary parasitic inductance and an unnecessary parasitic capacitance is prevented. The filter circuit component is mounted on the high-frequency component to obtain the desired frequency characteristics without the influence of a parasitic inductance and a parasitic capacitance. Since the component is located in a space surrounded by the inner peripheral surface of the supporting frame body, the packing density of components mounted on the high-frequency component is increased.

A method of forming an electronic device is described which comprises a stack of electronic components wherein each electronic component comprises a face and external terminations. A component stability structure is attached to at least one face. A circuit board is provided wherein the circuit board comprises circuit traces arranged for electrical engagement with the external terminations. The component stability structure mechanically engages with the circuit board and inhibits the electronic device from moving relative to the circuit board.

An I/O system including an I/O base having a first connector component, an I/O module selectively attachable to the I/O base and having a second connector component adapted to mate with the first connector component, and a locking actuator assembly for securing the I/O module to the I/O base. The locking actuator assembly includes an actuator supported for axial and rotational movement by the I/O module, the actuator movable from an unlocked position having a first end of the actuator extending from a housing of the I/O module to a locked position wherein a second end of the actuator extends from the housing. The second end of the actuator includes a flange adapted to pass through a corresponding slot in a surface of the I/O base such that when the actuator is rotated the at least one flange restricts withdrawal of the actuator from the slot in the I/O base.

A composite electronic component includes a capacitor device and a resistor device disposed on one another in a heightwise direction. The capacitor device includes a capacitor body, a first external electrode, and a second external electrode. The resistor device includes a base portion, a resistor body, a first upper surface conductor, a second upper surface conductor, a first lower surface conductor, a second lower surface conductor, a first end surface connection conductor, and a second end surface connection conductor. An upper surface of the base portion of the resistor device faces a lower surface of the capacitor body of the capacitor device, the first upper surface conductor and the first external electrode are electrically connected, and the second upper surface conductor and the second external electrode are electrically connected.

A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.

3D electrical integration is provided by connecting several component carriers to a single substrate using contacts at the edges of the component carriers making contact to a 2D contact array (e.g., a ball grid array or the like) on the substrate. The resulting integration of components on the component carriers is 3D, thereby providing much higher integration density than in 2D approaches.

According to one embodiment, a display device includes a first substrate, a second substrate opposing the first substrate, a liquid crystal layer and a light source that emits light to the liquid crystal layer, and the first substrate includes a first portion opposing the second substrate and having a first thickness and a second portion not opposing the second substrate and having a second thickness which is less than the first thickness, and the light source is disposed on the second portion, and the light source includes a first surface opposing the second portion and a second surface opposing the first surface, and a wiring substrate is disposed on the second surface so that the wiring substrate does not protrude with respect to the second substrate in a thickness direction.

The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.