Patent classifications
H05K2201/10636
Component carrier with embedded component having pads connected in different wiring layers
A component carrier includes a stack having at least one electrically insulating layer structure and a plurality of electrically conductive layer structures, and a component embedded in the stack and having an array of pads on a main surface of the component. A first electrically conductive connection structure of the electrically conductive layer structures electrically connects a first pad of the pads up to a first wiring plane, and a second electrically conductive connection structure of the electrically conductive layer structures electrically connects a second pad of the pads up to a second wiring plane being different from the first wiring plane.
Electronic component mounting device and semiconductor device including the same
An electronic component mounting device includes an insulating substrate having a metal pattern formed thereon and a MELF electronic component. The MELF electronic component is fitted into a first receiving portion configured with the metal pattern and the insulating substrate exposed from a lacking portion of the metal pattern. The electronic component mounting device further includes a conductive member formed between the MELF electronic component and the metal pattern, and the conductive member is not formed between the MELF electronic component and the insulating substrate.
ELECTRONIC COMPONENT AND A METHOD FOR MANUFACTURING AN ELECTRONIC COMPONENT
An electronic component includes a first functional element including a pair of first connecting electrode portions formed on a first mounting surface, a pair of pillar electrodes connected to the corresponding first connecting electrode portions, a second functional element that includes a pair of second connecting electrode portions formed on a second mounting surface and that is arranged in a space defined by the first mounting surface of the first functional element and the pair of pillar electrodes, a pair of pad electrodes connected to the corresponding second connecting electrode portions, and a sealing resin that seals the pair of pillar electrodes, the pair of pad electrodes and the second functional element so as to expose the first lower surfaces of the pair of pillar electrodes and the second lower surfaces of the pair of pad electrodes.
COMPONENT BUILT-IN SUBSTRATE
A component built-in substrate includes a multilayer body and a substrate including a multilayer ceramic electronic component embedded therein. The multilayer ceramic electronic component includes a first connection portion that protrudes from the first external electrode, and a second connection portion that protrudes from the second external electrode. The substrate includes a core material. The multilayer ceramic electronic component including the first connection portion and the second connection portion includes a surface covered by the core material and embedded in the substrate. The first connection portion protrudes toward a surface of the substrate, and is not exposed at the surface of the substrate. The second connection portion protrudes toward the surface of the substrate, and is not exposed at the surface of the substrate.
Wiring substrate and method for manufacturing wiring subtrate
A wiring substrate includes a core substrate. The core substrate includes a first surface, a second surface, and an opening extending through the core substrate between the first and second surfaces. A first conductive film is formed on the first surface and covers the opening. A second conductive film is formed on the second surface. The second conductive film covers the opening. An electronic component is arranged in the opening and connected to the first conductive film. An insulator fills the opening. A first wiring portion includes alternately stacked insulative layers and wiring layers and covers the first surface of the core substrate and the first conductive film. A second wiring portion includes alternately stacked insulative layers and wiring layers, and covers the second surface of the core substrate and the second conductive film.
Ultra-small LED electrode assembly and method for manufacturing same
Provided are a nano-scale LED assembly and a method for manufacturing the same. First, a nano-scale LED device that is independently manufactured may be aligned and connected to two electrodes different from each other to solve a limitation in which a nano-scale LED device having a nano unit is coupled to two electrodes different from each other in a stand-up state. Also, since the LED device and the electrodes are disposed on the same plane, light extraction efficiency of the LED device may be improved. Furthermore, the number of nano-scale LED devices may be adjusted. Second, since the nano-scale LED device does not stand up to be three-dimensionally coupled to upper and lower electrodes, but lies to be coupled to two electrodes different from each other on the same plane, the light extraction efficiency may be very improved. Also, since a separate layer is formed on a surface of the LED device to prevent the LED device and the electrode from being electrically short-circuited, defects of the LED electrode assembly may be minimized. Also, in preparation for the occurrence of the very rare defects of the LED device, the plurality of LED devices may be connected to the electrode to maintain the original function of the nano-scale LED electrode assembly.
Multilayer ceramic electronic component and board for mounting thereof
A multilayer ceramic electronic component may include a ceramic body including an active part in which dielectric layers and internal electrodes are alternately disposed, an upper cover part disposed on the active part, and a lower cover part disposed below the active part, a buffer layer disposed in at least one of the upper and lower cover parts, and external electrodes disposed on end surfaces of the ceramic body. The buffer layer may contain a conductive metal in a content of 1 to 40 vol %.
Multilayer ceramic electronic component and board having the same
A multilayer ceramic electronic component and a board having the same are provided. The multilayer ceramic electronic component includes a multilayer ceramic capacitor including external electrodes including front portions and band portions extended from the front portions, terminal electrodes respectively surrounding the front portions and portions of lower surfaces of the band portions of the external electrodes and respectively having a ‘’ shaped groove portion formed in lower portions thereof, and conductive adhesive layers connecting the external electrodes and the terminal electrodes to each other.
Multilayer ceramic electronic component and board having the same
A multilayer ceramic electronic component includes a ceramic body including a plurality of dielectric layers stacked on each other and having first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, parallel to a stacking direction and connected to the first and second surfaces, and fifth and sixth surfaces opposing each other in a third direction and connected to the first to fourth surfaces, first and second external electrodes disposed on the first and second surfaces of the ceramic body, respectively, first and second conductive thin films disposed on at least one of the third and fourth surfaces, connected to the first and second external electrodes, respectively, and having a thickness lower than that of the first and second external electrodes, and first and second solder preventing films disposed on the first and second external electrodes, respectively.
CIRCUIT BOARD WITH MEASURE AGAINST HIGH FREQUENCY NOISE
A circuit board with a measure against high frequency noise includes: an interconnect substrate having an interconnect pattern to which an IC which is a source of high frequency noise is electrically connected; a pair of lands provided on a mounting surface of the interconnect substrate; and a chip component having a body composed of a magnetic body (i.e., ferrite) in a rectangular parallelepiped, and a pair of external electrodes provided at opposite ends of the body, the pair of external electrodes being connected to the pair of lands, the body being disposed on the interconnect pattern, as observed in a direction perpendicular to the mounting surface.