A tolerance compensation element is for circuit configurations having a DCB (direct copper bonded) substrate and a PCB (printed circuit board). A circuit configuration further includes the tolerance compensation element. A tolerance compensation element is positioned in a targeted manner between the DCB substrate and PCB in a gap A for the contact-connection of components on the DCB substrate via additive manufacturing and is formed so as to close the gap.

In a component-embedded substrate, a component and wiring block units are embedded in a component-embedded layer; conductive layers are located on all surfaces of the wiring block units; the component and the wiring block units are arranged such that lower surface side conductive layers of the wiring block units and electrodes of the component contact lower surface side wiring layers; via-hole conductors are located in respective upper positions relative to upper surface side conductive layers of the wiring block units and the electrodes of the component; and upper surface side wiring layers of the component-embedded layer are thus electrically connected to upper surface side conductive layers of the wiring block units, and the electrodes of the component by the via-hole conductors.

A method of producing electronic components each including a substrate-type terminal and a device connected to the substrate-type terminal including a substrate body with first and second principal surfaces opposite to each other and an electrode configured to be connected to the device on the first principal surface, wherein the device is disposed on the first principal surface, includes forming grooves in a substrate from one of the first and second principal surfaces of the substrate such that the substrate is divided into the substrate-type terminals, the grooves each having a depth less than a thickness of the substrate, cutting the substrate from another principal surface opposite to the principal surface of the substrate body such that the grooves penetrate through the substrate in a thickness direction thereof, and mounting the device on each of the first principal surfaces.

There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers; and a plurality of internal electrodes disposed within the ceramic body, having the dielectric layer interposed therebetween, wherein, on a cross section of the ceramic body in a width-thickness direction thereof, when a distance between an uppermost internal electrode and a lowermost internal electrode measured at centers thereof in a width direction thereof is defined as a and a distance between the uppermost internal electrode and the lowermost internal electrode measured at edges thereof in the width direction thereof is defined as b, 0.953≦a/b≦0.996 is satisfied.

A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.

A printed circuit board includes a first chip component, a second chip component, and a printed wiring board. The first chip component and the second chip component each has a length L2 in the longitudinal direction. A relationship of 0.894≤L2/L1≤1.120 is satisfied, where L1 represents a length of the first opening in the longitudinal direction. A relationship of 0.894≤L2/4≤1.120 is satisfied, where length L4 represents a length of the second opening in the longitudinal direction. A relationship of 0.183≤L.sub.OA/L.sub.iA≤50.309 is satisfied, where L.sub.iA represents a length of the first land in the longitudinal direction, and L.sub.OA represents a thickness of solder on an end surface of the first electrode. A relationship of 0.183≤L.sub.OB/L.sub.iB≤0.309 is satisfied, where L.sub.iB represents a length of the second land in the longitudinal direction, and L.sub.OB represents a thickness of solder on an end surface of the second electrode.

A composite electronic component composed of a composite body including a capacitor and an electrostatic discharge (ESD) protection device coupled to each other. The capacitor includes a ceramic body in which a plurality of dielectric layers and internal electrodes are stacked with a respective dielectric layer therebetween. The ESD protection device includes first and second electrodes disposed on the ceramic body, a discharging part disposed between the first and second electrodes, and a protective layer disposed on the first and second electrodes and the discharging part. An input terminal disposed on a first end surface of the composite body and is connected to internal electrodes and the first and second electrodes. A ground terminal formed on a second end surface of the composite body and is connected to internal electrodes and the first and second electrodes.

The described embodiments relate generally to printed circuit boards (PCBs) including a capacitor and more specifically to designs for mechanically isolating the capacitor from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Conductive features can be mechanically and electrically coupled to electrodes located on two ends of the capacitor. The conductive features can be placed in corners where the amplitude of vibrations created by the piezoelectric forces is relatively small. The conductive features can then be soldered to a land pattern on the PCB to form a mechanical and electrical connection while reducing an amount of vibrational energy transferred from the capacitor to the PCB.

A voltage regulator module includes a first circuit board assembly and a magnetic core assembly. The first circuit board assembly includes a first printed circuit board, a plurality of switch elements and a first molding compound layer. The switch elements are mounted on a first surface of the first printed circuit board. The first molding compound layer is formed on the first surface of the first printed circuit board to encapsulate the switch elements. The magnetic core assembly is arranged beside a second surface of the first printed circuit board, and includes a magnetic core portion and at least one first U-shaped copper structure. The magnetic core portion includes a plurality of openings. Each first U-shaped copper structure is penetrated through two corresponding openings to define two inductors. A first terminal of each inductor and the corresponding switch element are connected in series to define a phase circuit.

A substrate that includes a first dielectric layer and a capacitor embedded in the first dielectric layer. The capacitor includes a first terminal, a second terminal, and a third terminal. The second terminal is laterally located between the first terminal and the third terminal. The capacitor also includes a second dielectric layer, a first metal layer and a second metal layer. The first metal layer is coupled to the first and third terminals. The first metal layer, the first terminal, and the third terminal are configured to provide a first electrical path for a first signal. The second metal layer is coupled to the second terminal. The second metal layer and the second terminal are configured to provide a second electrical path for a second signal.