Patent classifications
H05K2201/10712
Component carrier and manufacturing method
A component carrier includes a first level stack of first plural of electrically conductive layer structures and/or first electrically insulating layer structures; a first component aligned within a first through hole cut out in the first level stack such that one of an upper or a lower surface of the first component is substantially flush with an respective upper or a lower surface of the first level stack second electrically conductive layer structures and/or second electrically insulating layer structures attached onto the upper and the lower surface of the first level stack thereby covering the first component at the upper and the lower surface of the first component and pressed to form a second level stack. A second component is aligned within a second through hole cut out in the second level stack such that one of upper or a lower surface of the second component is substantially flush with an upper or a lower surface of the second level stack.
Electronic apparatus, and circuit board and control device thereof
An electronic apparatus and a circuit board thereof are provided. The electronic apparatus operates in cooperation with a packaged electronic component. The electronic apparatus includes a circuit board and a control device disposed on the circuit board. The circuit board includes a plurality of conductive vias passing therethrough, and the conductive vias includes a plurality of first conductive vias arranged respectively corresponding to the first contact pads of the packaged electronic component. The control device includes a signal contact array including a plurality of first signal contacts. When the packaged electronic component and the control device are respectively disposed on two opposite sides of the circuit board, the packaged electronic component and the control device at least partially overlap in a thickness direction of the circuit board, and the first signal contacts are respectively electrically connected to the first contact pads via the corresponding conductive vias.
FINE PITCH COMPONENT PLACEMENT ON PRINTED CIRCUIT BOARDS
Systems and methods for fine pitch component placement on printed circuit boards are described. In one embodiment, a printed circuit board includes multiple vias and multiple of electrically conductive pads. The multiple vias include at least a first via and a second via. The multiple electrically conductive pads include a first pad and a second pad. The first pad and/or the second pad may include an electrically conductive material such as copper, silver, gold, or another conductive material. In some cases, the first pad and the second pad each have a reduced width portion positioned between and spaced apart from the first via and the second via.
ELECTRONIC APPARATUS, AND CIRCUIT BOARD AND CONTROL DEVICE THEREOF
An electronic apparatus and a circuit board thereof are provided. The electronic apparatus operates in cooperation with a packaged electronic component. The electronic apparatus includes a circuit board and a control device disposed on the circuit board. The circuit board includes a plurality of conductive vias passing therethrough, and the conductive vias includes a plurality of first conductive vias arranged respectively corresponding to the first contact pads of the packaged electronic component. The control device includes a signal contact array including a plurality of first signal contacts. When the packaged electronic component and the control device are respectively disposed on two opposite sides of the circuit board, the packaged electronic component and the control device at least partially overlap in a thickness direction of the circuit board, and the first signal contacts are respectively electrically connected to the first contact pads via the corresponding conductive vias.
Component Carrier and Manufacturing Method
A component carrier includes a first level stack of first plural of electrically conductive layer structures and/or first electrically insulating layer structures; a first component aligned within a first through hole cut out in the first level stack such that one of an upper or a lower surface of the first component is substantially flush with an respective upper or a lower surface of the first level stack second electrically conductive layer structures and/or second electrically insulating layer structures attached onto the upper and the lower surface of the first level stack thereby covering the first component at the upper and the lower surface of the first component and pressed to form a second level stack. A second component is aligned within a second through hole cut out in the second level stack such that one of upper or a lower surface of the second component is substantially flush with an upper or a lower surface of the second level stack.
ARRAY TYPE DISCRETE DECOUPLING UNDER BGA GRID
Various exemplary embodiments relate to a printed circuit board (PCB) for electrically connecting a discrete array component including a pattern formed on the PCB which is a merger of a set of via pads and a discrete array component; wherein the pattern is generated by a pin mapping between the discrete array component and a via grid array on the PCB; and wherein the pattern is formed of a metal etched during a manufacturing process of the PCB.
Ball grid array formed on printed circuit board
A Ball Grid Array (BGA) formed on printed circuit board is provided. The BGA comprises a first solder ball module and a second solder ball module. The first solder ball module comprises a plurality of first solder balls, wherein one of the first solder balls is grounded for shielding two other first solder balls, and one of the first solder balls is floating. The second solder ball module comprises a plurality of second solder balls, wherein two of the second solder balls are grounded and one of the two grounded second solder balls penetrates the printed circuit board through a plated through hole formed on the printed circuit board for shielding two first solder balls among the first solder balls.
HIGH-DENSITY DECOUPLING CAPACITOR ROUTING OPTIMIZING CAPACITANCE WITH CONSIDERATION FOR HIGH-YIELD MANUFACTURING
A multi-layer printed circuit board includes a substrate having a first side and a second side opposite the first side, a central via pad disposed on the first side and having a plurality of central-extensions extending outwardly therefrom, a first via pad disposed on the first side and having at least one first-extension extending outwardly therefrom, a second via pad disposed on the first side and having at least one first-extension extending outwardly therefrom, wherein each central-extension has a first-connection-edge, wherein each first-extension has a second-connection-edge, wherein a first first-connection edge of a first central-extension faces a second-connection-edge of the first via pad, and a line perpendicular to the first first-connection edge and to the second-connection-edge of the first via pad forms an angle with a via-to-via axis line between the central via pad and the first via pad, and the angle is greater than a predetermined threshold angle.