A socket connector includes a socket assembly having a socket substrate and socket contacts. The socket substrate has first and second upper mating areas and a first lower mating area. The socket substrate has first and second socket substrate conductors at the first and second upper mating areas, respectively, and third socket substrate conductors at the first lower mating area electrically connected to corresponding first socket substrate conductors. The first socket substrate conductors are electrically connected to an electronic package, the second socket substrate conductors are electrically connected to an electrical component and the third socket substrate conductors are electrically connected to a host circuit board. The socket assembly is configured to electrically connect the electronic package with both the host circuit board and the electrical component. The socket contacts have a terminating end terminated to corresponding first socket substrate conductors and a mating end mated to package contacts.

An electronic device includes a printed circuit board (PCB) defining a cavity, a first component pad of the PCB positioned outside the cavity, and a second component pad of the PCB positioned on a bottom surface of the cavity. The first component pad has a first thickness, and the second component pad has a second thickness that is less than the first thickness of the first component pad. An electronic component, such as a surface mounted technology (SMT) component, is mounted to the second component pad within the cavity.

The invention relates to a semiconductor component (2), comprising a semiconductor chip (3), a housing (5) and a connection point arrangement (10) having at least two rows (14, 16) of planar connection points (12), which are arranged on a bottom side of the housing (5) and can be electrically connected by means of connections to corresponding contacts of a contact arrangement having at least two rows, which contact arrangement is arranged on a printed circuit board, wherein the geometry of the contact arrangement corresponds to the geometry of the connection point arrangement (10), a first distance is specified between two adjacent first connection points (14A) of a first row (14) of the connection point arrangement (10) and a second distance is specified between two adjacent second connection points (16A) of a second row (16) of the connection point arrangement (10), and the second connection points (16A) of the second row (16) are offset to the first connection points (14A) of the first row (14). The invention also relates to a corresponding contacting assembly having such a semiconductor element (2) and a printed circuit board. The first distance at least between two adjacent first connection points (14A) of the first row (14) of the connection point arrangement (10) corresponds to an intermediate space (C, D) between two contacts of the corresponding contact arrangement, in which intermediate space at least two conducting tracks (28) having functionally reliable dimensions and distances can be arranged.

A fingerprint sensor module includes a fingerprint sensor assembly with a circuit element attached. The fingerprint sensor assembly is electrically connected to a printed circuit board (PCB) substrate with a cutout to accommodate the circuit element. The entire fingerprint sensor assembly and at least part of the PCB are encapsulated in a encapsulating material to produce a structurally robust fingerprint sensor module suitable for integration into an electronics device such as a smartphone or other Internet of Things (IOT) electronic device.

Provided is a printed wiring board comprising: a substrate; a conductive layer including a land and a wiring and formed on a surface of the substrate, the wiring having a width smaller than the land and drawn from the land; and an insulating layer formed on the conductive layer. The insulating layer has an opening corresponding to a position of the land, and an edge of the opening runs above the land and above one of edges in a width direction of the wiring.

An electronic module includes a substrate having a first main surface and a second main surface, first electronic components on the first main surface, second electronic components on the second main surface, a first sealing resin portion, and a second sealing resin portion. Through holes are formed so as to extend through the substrate and the first sealing resin portion. A third electronic component is placed in the through holes. An area between the through holes and the third electronic component is filled with the second sealing resin portion, and the second sealing resin portion is formed to be exposed at a surface of the first sealing resin portion. When viewed in a direction perpendicular to the first main surface, the second sealing resin portion surrounds the third electronic component. The first sealing resin portion and the second sealing resin portion are made of different types of resins.

A low inductance electrical switching circuit arrangement, includes a two sided substrate with a plurality of through-substrate electrical vias. A capacitor is arranged on the substrate first side above a first via, and an electrical sink is arranged on the first side above a second via. A switching component configured to produce a plurality of current pulses is arranged on the substrate second side below the first and second via.

A surface mountable laser driver circuit package is configured to mount on a host printed circuit board (PCB). A surface mount circuit package includes a lead-frame. A plurality of laser driver circuit components is mounted on and in electrical communication with the lead-frame of the surface mount circuit package. A dielectric layer is located between the lead-frame and the host PCB and includes portals through the dielectric layer each arranged to accommodate an electrical connection between the lead-frame and the host PCB. The lead-frame and the dielectric layer are arranged such that a first lead-frame portion and a first dielectric layer portal align with a first end of a host PCB trace configured to provide a current return path for the surface mount laser driver, and a second lead-frame portion and a second dielectric layer portal align with a second end of the host PCB trace.

Provided is a printed wiring board comprising: a substrate; a conductive layer including a land and a wiring and formed on a surface of the substrate, the wiring having a width smaller than the land and drawn from the land; and an insulating layer formed on the conductive layer. The insulating layer has an opening corresponding to a position of the land, and an edge of the opening runs above the land and above one of edges in a width direction of the wiring.

A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the substrate is reduced by one or more non-conductive voids though the thickness of the conductive portion of the land pad. The voids may allow the contact area of the land pad, as defined by the perimeter of the land pad, to remain the same while reducing the conductive portion that overlaps the parallel ground plane. Capacitance between the land pad and the parallel ground plane is reduced by an amount proportional to the reduction in overlapping conductive area.