A bonding pad such as for a ball grid array includes a conductive pad having a top surface and a first interface surface in contact with a signal trace of a substrate, and a plating layer having a bottom surface in direct contact with the top surface of the conductive pad. The plating layer includes one or more protrusions extending toward the signal trace in a direction generally parallel to a longitudinal axis of the signal trace. Each of the one or more protrusions includes two parallel sidewalls extending upwardly from the bottom surface of the plating layer, and a second interface surface contiguous with the bottom surface of the plating layer. The second interface surface is positioned over and in direct contact with a top surface of the signal trace. The protrusions prevent the connection to the signal trace from being compromised.

In some examples, a package comprises a semiconductor die having a first surface and a second surface opposing the first surface, the semiconductor die including circuitry formed in the first surface. The package includes an acoustic waveguide in the semiconductor die, the acoustic waveguide including an array of capacitors. The array of capacitors includes a transducer portion and a diffraction grating portion. The transducer portion is configured to convert signals between electrical signals and acoustic waves, and the diffraction grating portion is configured to direct the acoustic waves toward and receive the acoustic waves from the second surface.

A printed circuit board can include a substrate layer, a first metal layer disposed over the substrate layer, a core layer disposed over the first metal layer, and a second metal layer disposed over the core layer, where the core layer defines a closed cavity between the first and second metal layers. Optionally, the cavity is filled with air and operates as an antenna.

A capacitor loop substrate assembly includes a substrate with a loop shape, one or more capacitors or other electronic components on the substrate, and an opening in the substrate to allow the capacitor loop substrate assembly to be coupled to an integrated circuit package, such as a package including a die. Interconnects and/or contacts for interconnects are formed in an integrated circuit package to couple the capacitor loop substrate assembly to the integrated circuit package.

An electronic device carrier structure can include a substrate including a plurality of electrical contacts spaced apart on the substrate, a plurality of electrically conductive balls, each of the electrically conductive balls being on a respective one of the plurality of electrical contacts, solder attaching each of the electrically conductive balls to respective ones of the electrical contacts to form an attachment boundary where the solder ends on a surface of each of the plurality of electrically conductive balls, and a polymer layer extending on the substrate onto the plurality of electrically conductive balls to form a surface of the polymer layer at a contact point on the plurality of electrically conductive balls that is above the attachment boundary and below an apex of each of the plurality of electrically conductive balls.

A semiconductor module includes a semiconductor device having a first land, a second land, and a third land, a wiring board having a substrate, and a fourth land, a fifth land, and a sixth land disposed on the main surface of the substrate, a chip component having a first electrode and a second electrode disposed across a distance in the longitudinal direction and being disposed between the wiring board and the semiconductor device, a first solder joint for bonding the first land, the fourth land, and the first electrode, a second solder joint for bonding the second land, the fifth land, and the second electrode, and a third solder joint for bonding the third land and the sixth land. The volume of the first solder joint and the volume of the second solder joint are each larger than the volume of the third solder joint.

The invention relates to a flip-chip integrated circuit package of the ball array type, wherein: the underside of the package includes a plurality of receiving pads for signal, ground and solder balls; stacks of signal and ground vias, electrically connected to respective receiving pads, pass vertically through the package's dielectric body forming a quasi-coaxial structure. In an upper part of the package body: the signal vias are electrically connected to a lesser number of signal conductive bumps protruding from the upper surface of the package's dielectric body; and at least two ground vias are connected by means of conductive projections to respective ground conductive bumps, forming a ring around the signal conductive bumps.

A blank package for mimicking an electronic component package comprises a body and a plurality of conductive pads. The body is formed from generally transparent electrically insulating material and has a top surface, a bottom surface, and a plurality of side surfaces. The bottom surface has a shape and dimensions that are similar to a bottom surface of the electronic component package. The conductive pads are formed from electrically conductive material and attached to the body, with each conductive pad corresponding to a successive one of the conductive pads of the electronic component package. Each conductive pad has features that are similar to features of the corresponding conductive pad of the electronic component package.

For example, an apparatus may include a Printed Circuit Board (PCB) including a Ball Grid Array (BGA) on a first side of the PCB, the BGA configured to connect a Surface Mounted Device (SMD) to the PCB; an antenna disposed on a second side of the PCB opposite to the first side, the antenna to communicate a Radio Frequency (RF) signal of the SMD; and an RF transition to transit the RF signal between the BGA and the antenna, the RF transition including a plurality of signal buried-vias; a first plurality of microvias configured to transit the RF signal between the plurality of signal buried-vias and a ball of the BGA, the first plurality of microvias are rotationally misaligned with respect to the plurality of signal buried-vias; and a second plurality of microvias configured to transit the RF signal between the plurality of signal buried-vias and the antenna.

A multilayer substrate includes a base body including a first main surface, a first external electrode provided on the first main surface and made of metal foil, a first interlayer connection conductor, and a second interlayer connection conductor having higher conductivity than the first interlayer connection conductor. The base body includes insulating base material layers that are stacked on one another. The first interlayer connection conductor is provided at least in an insulating base material layer on which the first external electrode is provided, and is connected to the first external electrode. The second interlayer connection conductor is disposed inside the base body, and is connected to the first external electrode through the first interlayer connection conductor.