H10K10/466

Sensors with integrated data processing circuitry

A system for sensing data includes one or more sensors formed on a substrate, including flexible substrates. A plurality of transistors are coupled to the one or more sensors and formed on the substrate. Each transistor of the plurality of transistors is constructed with a channel formed of a nanoscale material. The plurality of transistors are configured to perform computing tasks such that data processing and classification are performed directly on the sensor substrate. The nanoscale material can include carbon nanotubes.

COMPOSITION, LAMINATE, METHOD OF MANUFACTURING LAMINATE, TRANSISTOR, AND METHOD OF MANUFACTURING TRANSISTOR

A method of manufacturing a laminate, transistor, and method of manufacturing transistor using a composition that includes an organic compound having a hydroxy group; a first cross-linking agent that is at least one organic silicon compound selected from the group including an organic silicon compound including a siloxane bond in the molecule and having three or more cyclic ether groups in the molecule, a chain organic silicon compound including two or more siloxane bonds in the molecule and having two or more cyclic ether groups in the molecule, a cyclic organic silicon compound including D unit in the molecule and having four or more cyclic ether groups bonded to a silicon atom of the D unit in the molecule, and a cyclic organic silicon compound including a T unit in the molecule and having two or more cyclic ether groups in the molecule; and a photocationic polymerization initiator.

ELECTRONIC RATCHET
20220238823 · 2022-07-28 ·

Electronic ratchet devices comprising a pair of first and second electrodes; a dielectric layer; a gate electrode layer; and a transport layer are disclosed herein.

Pattern forming method, method for producing transistor, and member for pattern formation
11398601 · 2022-07-26 · ·

What is provided is a pattern forming method for forming a pattern on a surface to be processed of an object, the method including: a first layer forming step of forming a first layer containing a compound having a protective group that is decomposable by an acid and also decomposable by light, on the surface to be processed; a second layer forming step of forming a second layer containing a photoacid generator that is configured to generate an acid by exposure, on the first layer; an exposure step of exposing the first layer and the second layer to form a latent image including an exposed region and an unexposed region, on the first layer; and a disposition step of disposing a pattern forming material in the exposed region or the unexposed region.

Organic light emitting transistors including organic semiconductor layers with different lengths and widths

In some examples, an organic light emitting transistor (OLET) comprises a substrate layer; a gate electrode disposed on the substrate layer; and a dielectric layer disposed on the gate electrode. The OLET further comprises a first organic semiconductor layer (OSL) disposed on the dielectric layer; a second OSL disposed on the first OSL; a third OSL disposed on the second OSL; a drain electrode disposed on the third OSL; a first source electrode partially disposed on both the first OSL and the third OSL; and a second source electrode partially disposed on both the first OSL and the third OSL, wherein a length of the first OSL is larger than lengths of both the second and third OSLs, and wherein a width of the first OSL is smaller than widths of both the second and third OSLs.

ARRAY SUBSTRATE AND DISPLAY DEVICE
20210408122 · 2021-12-30 ·

The present disclosure provides an array substrate and a display panel. The driving circuit layer of the array substrate provided with a first thin-film transistor (TFT) and a second TFT. An exemplified active layer of a P-type TFT is formed by organic conductive polymer material. By using organic conductive polymer materials as the active layer material of the first TFT, the technical problems of the flexibility of the display substrate resulting by the characteristics of the low temperature polysilicon material are solved. The flexibility of the array substrate is enhanced.

CMOS Fabrication Methods for Back-Gate Transistor

A device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the etch stop layer. The work function layer is an n-type work function layer. The device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. The dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.

Method for forming nano-gaps in graphene

The present invention relates to a method for forming nano-gaps in graphene. The method may include applying a voltage across a region of graphene such that a nano-gap which extends across the entire width of the graphene is formed, wherein the region across which the voltage is applied may include a point which is the narrowest in the region.

UV PATTERNABLE POLYMER BLENDS FOR ORGANIC THIN-FILM TRANSISTORS
20210384433 · 2021-12-09 ·

A polymer blend includes an organic semiconductor polymer blended with an isolating polymer; at least one photoinitiator for generating active radicals; and at least one crosslinker comprising C═C bonds, thiols, or combinations thereof, such that the organic semiconductor polymer is a diketopyrrolopyrrole-fused thiophene polymeric material, the fused thiophene is beta-substituted, and the isolating polymer has a non-conjugated backbone. A method of forming an organic semiconductor device having the polymer blend is also presented.

FILM STRUCTURE, ELEMENT, AND MULTILEVEL ELEMENT

The film structure according to an embodiment of the present invention includes at least one active monolayer having an energy level quantized in at least one axial direction and at least one barrier alternately stacked with the at least one active monolayer. Current flows through the active monolayer, and the current flow may be limited by the quantized energy level.